Josh Sharp via llvm-dev
2019-Jun-03 22:56 UTC
[llvm-dev] Byte ordering during machine code generation
Hi, Is there a way to specify the byte ordering in a way that's neither big nor little endian during machine code generation? For example, if B3B2B1B0 is a 32-bit instruction with B3 the most significant byte, is there a way to write it as B1 B0 B3 B2 ? Thanks. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20190603/bc06bf3f/attachment-0001.html>
Eli Friedman via llvm-dev
2019-Jun-03 23:10 UTC
[llvm-dev] Byte ordering during machine code generation
The ARM backend does something similar to what you're describing for Thumb code; see ARMMCCodeEmitter::encodeInstruction. -Eli From: llvm-dev <llvm-dev-bounces at lists.llvm.org> On Behalf Of Josh Sharp via llvm-dev Sent: Monday, June 3, 2019 3:57 PM To: via llvm-dev <llvm-dev at lists.llvm.org> Subject: [EXT] [llvm-dev] Byte ordering during machine code generation Hi, Is there a way to specify the byte ordering in a way that's neither big nor little endian during machine code generation? For example, if B3B2B1B0 is a 32-bit instruction with B3 the most significant byte, is there a way to write it as B1 B0 B3 B2 ? Thanks. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20190603/65f0d103/attachment.html>