Hi Sjoerd, On Fri, May 3, 2019 at 8:19 AM Sjoerd Meijer via llvm-dev < llvm-dev at lists.llvm.org> wrote:> > I read that out-of-order cores are supported. How about in-order cores? > Would it be easy/difficult to add support for that? > >Cheers,> Sjoerd. > >I don't think that it would be difficult to support in-order superscalar cores. However, it would require a different llvm-mca pipeline of stages. That is because some stages (and simulated hardware components) work under the assumption that the processor is out-of-order (example: the dispatch stage and the retire stage). That being sadi, it would be a bit more complicated to add support instruction itineraries. At the moment, the tool doesn't understand itineraries. If there is interest in supporting in-order cores, then we should probably raise a bug for it. -Andrea ------------------------------> *From:* llvm-dev <llvm-dev-bounces at lists.llvm.org> on behalf of Matt > Davis via llvm-dev <llvm-dev at lists.llvm.org> > *Sent:* 02 May 2019 19:59 > *To:* Shoaib Meenai; lorenzo chelini; llvm-dev at lists.llvm.org > *Subject:* Re: [llvm-dev] Llvm-mca library. > > > Hi Lorenzo, > > > > I’ll answer the first question you have: > > > > > I would like to use llvm-mca to estimate the IPC of a given code region. > I am interested in the library version ( > https://reviews.llvm.org/D50929?id=162210 > <https://urldefense.proofpoint.com/v2/url?u=https-3A__reviews.llvm.org_D50929-3Fid-3D162210&d=DwMFAg&c=5VD0RTtNlTh3ycd41b3MUw&r=o3kDXzdBUE3ljQXKeTWOMw&m=Ehy5cbFrTOTrtNpj4jTjwnMXspCxyoUuKpn3m8pxGpg&s=iEwPb0T8FqcGV-IscWqa3SAw64L-buGNLYvMLOgWoi4&e=>) > but I have troubles understanding how to use it. Could you please point me > to some documentations or (better) some code examples if any? > > > > The best example of the llvm-mca library being used is the actual llvm-mca > tool itself. If you look in llvm/tools/llvm-mca/llvm-mca.cpp you’ll see > that it is just a large program that uses the llvm-mca API and library. > You’ll want to look at main() where the default pipline is created and the > viewers are associated to that pipeline instance. > > 1. You’ll need to construct an mca::Context and use that to create a > mca::Pipeline instance. For starters, I suggest just using the default > “out-of-order” pipeline. “createDefaultPipeline” > 2. Next, register some handlers take a look at the HWEventListener > class in include/llvm/MCA. Use “Pipeline::addEventListener” to register > for the events you might be interested in, such as pipeline stalls. > > llvm-mca.cpp does this on behalf of the Viewers. If you trace what the > viewers are doing in the source file, you’ll probably > > want to do something similar. > > 1. Call “Pipeline::run” to start your experiment and collect > performance information. > > > > Your second question: > > > > > Reading the documentation ( > https://llvm.org/docs/CommandGuide/llvm-mca.html > <https://urldefense.proofpoint.com/v2/url?u=https-3A__llvm.org_docs_CommandGuide_llvm-2Dmca.html&d=DwMFAg&c=5VD0RTtNlTh3ycd41b3MUw&r=o3kDXzdBUE3ljQXKeTWOMw&m=Ehy5cbFrTOTrtNpj4jTjwnMXspCxyoUuKpn3m8pxGpg&s=5845DcPA4uSN_lgPE_SlH6XwRSShIfPIvYR1t8AZHpU&e=>) > it also seems that llvm-mca does not take into account the cache hierarchy. > Does this mean that the tool assumes all the loads/stores hit the L1 cache? > > > > As you pointed out, MCA does not really model the cache hierarchy. You > might want to take a look at the Load/Store unit documentation as well: > http://llvm.org/doxygen/classllvm_1_1mca_1_1LSUnit.html > > > > You probably already saw this from the CommandGuide for llvm-mca, but I’ll > repeat it here: > > “The LSUnit does not attempt to predict if a load or store hits or misses > the L1 cache. It only knows if an instruction “MayLoad” and/or “MayStore.” > For loads, the scheduling model provides an “optimistic” load-to-use > latency (which usually matches the load-to-use latency for when there is a > hit in the L1D).” > > > > Hope that helps, > > -Matt > > > > > > *From: *Shoaib Meenai <smeenai at fb.com> > *Date: *Thursday, May 2, 2019 at 11:34 AM > *To: *lorenzo chelini <l.chelini at icloud.com>, "llvm-dev at lists.llvm.org" < > llvm-dev at lists.llvm.org>, Matt Davis <nullptr at fb.com> > *Subject: *Re: [llvm-dev] Llvm-mca library. > > > > (Adding Matt Davis, who should be able to help out here.) > > > > *From: *llvm-dev <llvm-dev-bounces at lists.llvm.org> on behalf of lorenzo > chelini via llvm-dev <llvm-dev at lists.llvm.org> > *Reply-To: *lorenzo chelini <l.chelini at icloud.com> > *Date: *Thursday, May 2, 2019 at 4:15 AM > *To: *"llvm-dev at lists.llvm.org" <llvm-dev at lists.llvm.org> > *Subject: *[llvm-dev] Llvm-mca library. > > > > Hi All, > > > > I would like to use llvm-mca to estimate the IPC of a given code region. I > am interested in the library version ( > https://reviews.llvm.org/D50929?id=162210 > <https://urldefense.proofpoint.com/v2/url?u=https-3A__reviews.llvm.org_D50929-3Fid-3D162210&d=DwMFAg&c=5VD0RTtNlTh3ycd41b3MUw&r=o3kDXzdBUE3ljQXKeTWOMw&m=Ehy5cbFrTOTrtNpj4jTjwnMXspCxyoUuKpn3m8pxGpg&s=iEwPb0T8FqcGV-IscWqa3SAw64L-buGNLYvMLOgWoi4&e=>) > but I have troubles understanding how to use it. Could you please point me > to some documentations or (better) some code examples if any? > > > > Reading the documentation ( > https://llvm.org/docs/CommandGuide/llvm-mca.html > <https://urldefense.proofpoint.com/v2/url?u=https-3A__llvm.org_docs_CommandGuide_llvm-2Dmca.html&d=DwMFAg&c=5VD0RTtNlTh3ycd41b3MUw&r=o3kDXzdBUE3ljQXKeTWOMw&m=Ehy5cbFrTOTrtNpj4jTjwnMXspCxyoUuKpn3m8pxGpg&s=5845DcPA4uSN_lgPE_SlH6XwRSShIfPIvYR1t8AZHpU&e=>) > it also seems that llvm-mca does not take into account the cache hierarchy. > Does this mean that the tool assumes all the loads/stores hit the L1 cache? > > > > Looking forward to hearing from you. > > Best regards, > > > > Lorenzo Chelini. > _______________________________________________ > LLVM Developers mailing list > llvm-dev at lists.llvm.org > https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev >-------------- next part -------------- An HTML attachment was scrubbed... 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Hi Andrea, We have quite a few Arm A-cores and also M-cores that would classify as in-order superscalars. I have been wanting to play with MCA for a while now, but never got round to it. I would be really interested in using it though. Just out of curiousity (I haven't looked much into this), why are the instruction itineraries more important for in-order cores? Cheers, Sjoerd. ________________________________ From: Andrea Di Biagio <andrea.dibiagio at gmail.com> Sent: 03 May 2019 12:42 To: Sjoerd Meijer Cc: Shoaib Meenai; lorenzo chelini; llvm-dev at lists.llvm.org; Matt Davis; nd Subject: Re: [llvm-dev] Llvm-mca library. Hi Sjoerd, On Fri, May 3, 2019 at 8:19 AM Sjoerd Meijer via llvm-dev <llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org>> wrote: I read that out-of-order cores are supported. How about in-order cores? Would it be easy/difficult to add support for that? Cheers, Sjoerd. I don't think that it would be difficult to support in-order superscalar cores. However, it would require a different llvm-mca pipeline of stages. That is because some stages (and simulated hardware components) work under the assumption that the processor is out-of-order (example: the dispatch stage and the retire stage). That being sadi, it would be a bit more complicated to add support instruction itineraries. At the moment, the tool doesn't understand itineraries. If there is interest in supporting in-order cores, then we should probably raise a bug for it. -Andrea ________________________________ From: llvm-dev <llvm-dev-bounces at lists.llvm.org<mailto:llvm-dev-bounces at lists.llvm.org>> on behalf of Matt Davis via llvm-dev <llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org>> Sent: 02 May 2019 19:59 To: Shoaib Meenai; lorenzo chelini; llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org> Subject: Re: [llvm-dev] Llvm-mca library. Hi Lorenzo, I’ll answer the first question you have:> I would like to use llvm-mca to estimate the IPC of a given code region. I am interested in the library version (https://reviews.llvm.org/D50929?id=162210<https://urldefense.proofpoint.com/v2/url?u=https-3A__reviews.llvm.org_D50929-3Fid-3D162210&d=DwMFAg&c=5VD0RTtNlTh3ycd41b3MUw&r=o3kDXzdBUE3ljQXKeTWOMw&m=Ehy5cbFrTOTrtNpj4jTjwnMXspCxyoUuKpn3m8pxGpg&s=iEwPb0T8FqcGV-IscWqa3SAw64L-buGNLYvMLOgWoi4&e=>) but I have troubles understanding how to use it. Could you please point me to some documentations or (better) some code examples if any?The best example of the llvm-mca library being used is the actual llvm-mca tool itself. If you look in llvm/tools/llvm-mca/llvm-mca.cpp you’ll see that it is just a large program that uses the llvm-mca API and library. You’ll want to look at main() where the default pipline is created and the viewers are associated to that pipeline instance. 1. You’ll need to construct an mca::Context and use that to create a mca::Pipeline instance. For starters, I suggest just using the default “out-of-order” pipeline. “createDefaultPipeline” 2. Next, register some handlers take a look at the HWEventListener class in include/llvm/MCA. Use “Pipeline::addEventListener” to register for the events you might be interested in, such as pipeline stalls. llvm-mca.cpp does this on behalf of the Viewers. If you trace what the viewers are doing in the source file, you’ll probably want to do something similar. 1. Call “Pipeline::run” to start your experiment and collect performance information. Your second question:> Reading the documentation (https://llvm.org/docs/CommandGuide/llvm-mca.html<https://urldefense.proofpoint.com/v2/url?u=https-3A__llvm.org_docs_CommandGuide_llvm-2Dmca.html&d=DwMFAg&c=5VD0RTtNlTh3ycd41b3MUw&r=o3kDXzdBUE3ljQXKeTWOMw&m=Ehy5cbFrTOTrtNpj4jTjwnMXspCxyoUuKpn3m8pxGpg&s=5845DcPA4uSN_lgPE_SlH6XwRSShIfPIvYR1t8AZHpU&e=>) it also seems that llvm-mca does not take into account the cache hierarchy. Does this mean that the tool assumes all the loads/stores hit the L1 cache?As you pointed out, MCA does not really model the cache hierarchy. You might want to take a look at the Load/Store unit documentation as well: http://llvm.org/doxygen/classllvm_1_1mca_1_1LSUnit.html You probably already saw this from the CommandGuide for llvm-mca, but I’ll repeat it here: “The LSUnit does not attempt to predict if a load or store hits or misses the L1 cache. It only knows if an instruction “MayLoad” and/or “MayStore.” For loads, the scheduling model provides an “optimistic” load-to-use latency (which usually matches the load-to-use latency for when there is a hit in the L1D).” Hope that helps, -Matt From: Shoaib Meenai <smeenai at fb.com<mailto:smeenai at fb.com>> Date: Thursday, May 2, 2019 at 11:34 AM To: lorenzo chelini <l.chelini at icloud.com<mailto:l.chelini at icloud.com>>, "llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org>" <llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org>>, Matt Davis <nullptr at fb.com<mailto:nullptr at fb.com>> Subject: Re: [llvm-dev] Llvm-mca library. (Adding Matt Davis, who should be able to help out here.) From: llvm-dev <llvm-dev-bounces at lists.llvm.org<mailto:llvm-dev-bounces at lists.llvm.org>> on behalf of lorenzo chelini via llvm-dev <llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org>> Reply-To: lorenzo chelini <l.chelini at icloud.com<mailto:l.chelini at icloud.com>> Date: Thursday, May 2, 2019 at 4:15 AM To: "llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org>" <llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org>> Subject: [llvm-dev] Llvm-mca library. Hi All, I would like to use llvm-mca to estimate the IPC of a given code region. I am interested in the library version (https://reviews.llvm.org/D50929?id=162210<https://urldefense.proofpoint.com/v2/url?u=https-3A__reviews.llvm.org_D50929-3Fid-3D162210&d=DwMFAg&c=5VD0RTtNlTh3ycd41b3MUw&r=o3kDXzdBUE3ljQXKeTWOMw&m=Ehy5cbFrTOTrtNpj4jTjwnMXspCxyoUuKpn3m8pxGpg&s=iEwPb0T8FqcGV-IscWqa3SAw64L-buGNLYvMLOgWoi4&e=>) but I have troubles understanding how to use it. Could you please point me to some documentations or (better) some code examples if any? Reading the documentation (https://llvm.org/docs/CommandGuide/llvm-mca.html<https://urldefense.proofpoint.com/v2/url?u=https-3A__llvm.org_docs_CommandGuide_llvm-2Dmca.html&d=DwMFAg&c=5VD0RTtNlTh3ycd41b3MUw&r=o3kDXzdBUE3ljQXKeTWOMw&m=Ehy5cbFrTOTrtNpj4jTjwnMXspCxyoUuKpn3m8pxGpg&s=5845DcPA4uSN_lgPE_SlH6XwRSShIfPIvYR1t8AZHpU&e=>) it also seems that llvm-mca does not take into account the cache hierarchy. Does this mean that the tool assumes all the loads/stores hit the L1 cache? Looking forward to hearing from you. Best regards, Lorenzo Chelini. _______________________________________________ LLVM Developers mailing list llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org> https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev -------------- next part -------------- An HTML attachment was scrubbed... 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No worries, thanks for the info! Sjoerd. ________________________________ From: Andrea Di Biagio <andrea.dibiagio at gmail.com> Sent: 03 May 2019 15:55 To: Sjoerd Meijer Subject: Re: [llvm-dev] Llvm-mca library. On Fri, May 3, 2019 at 3:24 PM Sjoerd Meijer <Sjoerd.Meijer at arm.com<mailto:Sjoerd.Meijer at arm.com>> wrote: Hi Andrea, We have quite a few Arm A-cores and also M-cores that would classify as in-order superscalars. I have been wanting to play with MCA for a while now, but never got round to it. I would be really interested in using it though. Just out of curiousity (I haven't looked much into this), why are the instruction itineraries more important for in-order cores? Sorry for the confusion. I didn't mean that itineraries are more important for in-order cores. I probably shouldn't have mentioned itineraries at all (ideally, for new subtargets should use schedmodel instead of itineraries) ;-). Back to the topic: I think that it would be nice to add support in-order processors. We should raise a bug for it, so that we can track the progress on that task. I would obviously do my best to help with the development. -Andrea Cheers, Sjoerd. ________________________________ From: Andrea Di Biagio <andrea.dibiagio at gmail.com<mailto:andrea.dibiagio at gmail.com>> Sent: 03 May 2019 12:42 To: Sjoerd Meijer Cc: Shoaib Meenai; lorenzo chelini; llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org>; Matt Davis; nd Subject: Re: [llvm-dev] Llvm-mca library. Hi Sjoerd, On Fri, May 3, 2019 at 8:19 AM Sjoerd Meijer via llvm-dev <llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org>> wrote: I read that out-of-order cores are supported. How about in-order cores? Would it be easy/difficult to add support for that? Cheers, Sjoerd. I don't think that it would be difficult to support in-order superscalar cores. However, it would require a different llvm-mca pipeline of stages. That is because some stages (and simulated hardware components) work under the assumption that the processor is out-of-order (example: the dispatch stage and the retire stage). That being sadi, it would be a bit more complicated to add support instruction itineraries. At the moment, the tool doesn't understand itineraries. If there is interest in supporting in-order cores, then we should probably raise a bug for it. -Andrea ________________________________ From: llvm-dev <llvm-dev-bounces at lists.llvm.org<mailto:llvm-dev-bounces at lists.llvm.org>> on behalf of Matt Davis via llvm-dev <llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org>> Sent: 02 May 2019 19:59 To: Shoaib Meenai; lorenzo chelini; llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org> Subject: Re: [llvm-dev] Llvm-mca library. Hi Lorenzo, I’ll answer the first question you have:> I would like to use llvm-mca to estimate the IPC of a given code region. I am interested in the library version (https://reviews.llvm.org/D50929?id=162210<https://urldefense.proofpoint.com/v2/url?u=https-3A__reviews.llvm.org_D50929-3Fid-3D162210&d=DwMFAg&c=5VD0RTtNlTh3ycd41b3MUw&r=o3kDXzdBUE3ljQXKeTWOMw&m=Ehy5cbFrTOTrtNpj4jTjwnMXspCxyoUuKpn3m8pxGpg&s=iEwPb0T8FqcGV-IscWqa3SAw64L-buGNLYvMLOgWoi4&e=>) but I have troubles understanding how to use it. Could you please point me to some documentations or (better) some code examples if any?The best example of the llvm-mca library being used is the actual llvm-mca tool itself. If you look in llvm/tools/llvm-mca/llvm-mca.cpp you’ll see that it is just a large program that uses the llvm-mca API and library. You’ll want to look at main() where the default pipline is created and the viewers are associated to that pipeline instance. 1. You’ll need to construct an mca::Context and use that to create a mca::Pipeline instance. For starters, I suggest just using the default “out-of-order” pipeline. “createDefaultPipeline” 2. Next, register some handlers take a look at the HWEventListener class in include/llvm/MCA. Use “Pipeline::addEventListener” to register for the events you might be interested in, such as pipeline stalls. llvm-mca.cpp does this on behalf of the Viewers. If you trace what the viewers are doing in the source file, you’ll probably want to do something similar. 1. Call “Pipeline::run” to start your experiment and collect performance information. Your second question:> Reading the documentation (https://llvm.org/docs/CommandGuide/llvm-mca.html<https://urldefense.proofpoint.com/v2/url?u=https-3A__llvm.org_docs_CommandGuide_llvm-2Dmca.html&d=DwMFAg&c=5VD0RTtNlTh3ycd41b3MUw&r=o3kDXzdBUE3ljQXKeTWOMw&m=Ehy5cbFrTOTrtNpj4jTjwnMXspCxyoUuKpn3m8pxGpg&s=5845DcPA4uSN_lgPE_SlH6XwRSShIfPIvYR1t8AZHpU&e=>) it also seems that llvm-mca does not take into account the cache hierarchy. Does this mean that the tool assumes all the loads/stores hit the L1 cache?As you pointed out, MCA does not really model the cache hierarchy. You might want to take a look at the Load/Store unit documentation as well: http://llvm.org/doxygen/classllvm_1_1mca_1_1LSUnit.html You probably already saw this from the CommandGuide for llvm-mca, but I’ll repeat it here: “The LSUnit does not attempt to predict if a load or store hits or misses the L1 cache. It only knows if an instruction “MayLoad” and/or “MayStore.” For loads, the scheduling model provides an “optimistic” load-to-use latency (which usually matches the load-to-use latency for when there is a hit in the L1D).” Hope that helps, -Matt From: Shoaib Meenai <smeenai at fb.com<mailto:smeenai at fb.com>> Date: Thursday, May 2, 2019 at 11:34 AM To: lorenzo chelini <l.chelini at icloud.com<mailto:l.chelini at icloud.com>>, "llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org>" <llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org>>, Matt Davis <nullptr at fb.com<mailto:nullptr at fb.com>> Subject: Re: [llvm-dev] Llvm-mca library. (Adding Matt Davis, who should be able to help out here.) From: llvm-dev <llvm-dev-bounces at lists.llvm.org<mailto:llvm-dev-bounces at lists.llvm.org>> on behalf of lorenzo chelini via llvm-dev <llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org>> Reply-To: lorenzo chelini <l.chelini at icloud.com<mailto:l.chelini at icloud.com>> Date: Thursday, May 2, 2019 at 4:15 AM To: "llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org>" <llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org>> Subject: [llvm-dev] Llvm-mca library. Hi All, I would like to use llvm-mca to estimate the IPC of a given code region. I am interested in the library version (https://reviews.llvm.org/D50929?id=162210<https://urldefense.proofpoint.com/v2/url?u=https-3A__reviews.llvm.org_D50929-3Fid-3D162210&d=DwMFAg&c=5VD0RTtNlTh3ycd41b3MUw&r=o3kDXzdBUE3ljQXKeTWOMw&m=Ehy5cbFrTOTrtNpj4jTjwnMXspCxyoUuKpn3m8pxGpg&s=iEwPb0T8FqcGV-IscWqa3SAw64L-buGNLYvMLOgWoi4&e=>) but I have troubles understanding how to use it. Could you please point me to some documentations or (better) some code examples if any? Reading the documentation (https://llvm.org/docs/CommandGuide/llvm-mca.html<https://urldefense.proofpoint.com/v2/url?u=https-3A__llvm.org_docs_CommandGuide_llvm-2Dmca.html&d=DwMFAg&c=5VD0RTtNlTh3ycd41b3MUw&r=o3kDXzdBUE3ljQXKeTWOMw&m=Ehy5cbFrTOTrtNpj4jTjwnMXspCxyoUuKpn3m8pxGpg&s=5845DcPA4uSN_lgPE_SlH6XwRSShIfPIvYR1t8AZHpU&e=>) it also seems that llvm-mca does not take into account the cache hierarchy. Does this mean that the tool assumes all the loads/stores hit the L1 cache? Looking forward to hearing from you. Best regards, Lorenzo Chelini. _______________________________________________ LLVM Developers mailing list llvm-dev at lists.llvm.org<mailto:llvm-dev at lists.llvm.org> https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev -------------- next part -------------- An HTML attachment was scrubbed... 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Hi, I have just raised: https://bugs.llvm.org/show_bug.cgi?id=41797 - MCA library document https://bugs.llvm.org/show_bug.cgi?id=41796 - Add support for in-order processors -Andrea On Fri, May 3, 2019 at 5:24 PM Sjoerd Meijer <Sjoerd.Meijer at arm.com> wrote:> No worries, thanks for the info! > > Sjoerd. > > ------------------------------ > *From:* Andrea Di Biagio <andrea.dibiagio at gmail.com> > *Sent:* 03 May 2019 15:55 > *To:* Sjoerd Meijer > *Subject:* Re: [llvm-dev] Llvm-mca library. > > > > On Fri, May 3, 2019 at 3:24 PM Sjoerd Meijer <Sjoerd.Meijer at arm.com> > wrote: > > Hi Andrea, > > We have quite a few Arm A-cores and also M-cores that would classify as > in-order superscalars. I have been wanting to play with MCA for a while > now, but never got round to it. I would be really interested in using it > though. Just out of curiousity (I haven't looked much into this), why are > the instruction itineraries more important for in-order cores? > > > Sorry for the confusion. > I didn't mean that itineraries are more important for in-order cores. I > probably shouldn't have mentioned itineraries at all (ideally, for new > subtargets should use schedmodel instead of itineraries) ;-). > > Back to the topic: I think that it would be nice to add support in-order > processors. > We should raise a bug for it, so that we can track the progress on that > task. > I would obviously do my best to help with the development. > > -Andrea > > > Cheers, > Sjoerd. > > ------------------------------ > *From:* Andrea Di Biagio <andrea.dibiagio at gmail.com> > *Sent:* 03 May 2019 12:42 > *To:* Sjoerd Meijer > *Cc:* Shoaib Meenai; lorenzo chelini; llvm-dev at lists.llvm.org; Matt > Davis; nd > *Subject:* Re: [llvm-dev] Llvm-mca library. > > Hi Sjoerd, > > On Fri, May 3, 2019 at 8:19 AM Sjoerd Meijer via llvm-dev < > llvm-dev at lists.llvm.org> wrote: > > > I read that out-of-order cores are supported. How about in-order cores? > Would it be easy/difficult to add support for that? > > > Cheers, > Sjoerd. > > > I don't think that it would be difficult to support in-order superscalar > cores. > However, it would require a different llvm-mca pipeline of stages. That is > because some stages (and simulated hardware components) work under the > assumption that the processor is out-of-order (example: the dispatch stage > and the retire stage). > That being sadi, it would be a bit more complicated to add support > instruction itineraries. At the moment, the tool doesn't understand > itineraries. > > If there is interest in supporting in-order cores, then we should probably > raise a bug for it. > > -Andrea > > > ------------------------------ > *From:* llvm-dev <llvm-dev-bounces at lists.llvm.org> on behalf of Matt > Davis via llvm-dev <llvm-dev at lists.llvm.org> > *Sent:* 02 May 2019 19:59 > *To:* Shoaib Meenai; lorenzo chelini; llvm-dev at lists.llvm.org > *Subject:* Re: [llvm-dev] Llvm-mca library. > > > Hi Lorenzo, > > > > I’ll answer the first question you have: > > > > > I would like to use llvm-mca to estimate the IPC of a given code region. > I am interested in the library version ( > https://reviews.llvm.org/D50929?id=162210 > <https://urldefense.proofpoint.com/v2/url?u=https-3A__reviews.llvm.org_D50929-3Fid-3D162210&d=DwMFAg&c=5VD0RTtNlTh3ycd41b3MUw&r=o3kDXzdBUE3ljQXKeTWOMw&m=Ehy5cbFrTOTrtNpj4jTjwnMXspCxyoUuKpn3m8pxGpg&s=iEwPb0T8FqcGV-IscWqa3SAw64L-buGNLYvMLOgWoi4&e=>) > but I have troubles understanding how to use it. Could you please point me > to some documentations or (better) some code examples if any? > > > > The best example of the llvm-mca library being used is the actual llvm-mca > tool itself. If you look in llvm/tools/llvm-mca/llvm-mca.cpp you’ll see > that it is just a large program that uses the llvm-mca API and library. > You’ll want to look at main() where the default pipline is created and the > viewers are associated to that pipeline instance. > > 1. You’ll need to construct an mca::Context and use that to create a > mca::Pipeline instance. For starters, I suggest just using the default > “out-of-order” pipeline. “createDefaultPipeline” > 2. Next, register some handlers take a look at the HWEventListener > class in include/llvm/MCA. Use “Pipeline::addEventListener” to register > for the events you might be interested in, such as pipeline stalls. > > llvm-mca.cpp does this on behalf of the Viewers. If you trace what the > viewers are doing in the source file, you’ll probably > > want to do something similar. > > 1. Call “Pipeline::run” to start your experiment and collect > performance information. > > > > Your second question: > > > > > Reading the documentation ( > https://llvm.org/docs/CommandGuide/llvm-mca.html > <https://urldefense.proofpoint.com/v2/url?u=https-3A__llvm.org_docs_CommandGuide_llvm-2Dmca.html&d=DwMFAg&c=5VD0RTtNlTh3ycd41b3MUw&r=o3kDXzdBUE3ljQXKeTWOMw&m=Ehy5cbFrTOTrtNpj4jTjwnMXspCxyoUuKpn3m8pxGpg&s=5845DcPA4uSN_lgPE_SlH6XwRSShIfPIvYR1t8AZHpU&e=>) > it also seems that llvm-mca does not take into account the cache hierarchy. > Does this mean that the tool assumes all the loads/stores hit the L1 cache? > > > > As you pointed out, MCA does not really model the cache hierarchy. You > might want to take a look at the Load/Store unit documentation as well: > http://llvm.org/doxygen/classllvm_1_1mca_1_1LSUnit.html > > > > You probably already saw this from the CommandGuide for llvm-mca, but I’ll > repeat it here: > > “The LSUnit does not attempt to predict if a load or store hits or misses > the L1 cache. It only knows if an instruction “MayLoad” and/or “MayStore.” > For loads, the scheduling model provides an “optimistic” load-to-use > latency (which usually matches the load-to-use latency for when there is a > hit in the L1D).” > > > > Hope that helps, > > -Matt > > > > > > *From: *Shoaib Meenai <smeenai at fb.com> > *Date: *Thursday, May 2, 2019 at 11:34 AM > *To: *lorenzo chelini <l.chelini at icloud.com>, "llvm-dev at lists.llvm.org" < > llvm-dev at lists.llvm.org>, Matt Davis <nullptr at fb.com> > *Subject: *Re: [llvm-dev] Llvm-mca library. > > > > (Adding Matt Davis, who should be able to help out here.) > > > > *From: *llvm-dev <llvm-dev-bounces at lists.llvm.org> on behalf of lorenzo > chelini via llvm-dev <llvm-dev at lists.llvm.org> > *Reply-To: *lorenzo chelini <l.chelini at icloud.com> > *Date: *Thursday, May 2, 2019 at 4:15 AM > *To: *"llvm-dev at lists.llvm.org" <llvm-dev at lists.llvm.org> > *Subject: *[llvm-dev] Llvm-mca library. > > > > Hi All, > > > > I would like to use llvm-mca to estimate the IPC of a given code region. I > am interested in the library version ( > https://reviews.llvm.org/D50929?id=162210 > <https://urldefense.proofpoint.com/v2/url?u=https-3A__reviews.llvm.org_D50929-3Fid-3D162210&d=DwMFAg&c=5VD0RTtNlTh3ycd41b3MUw&r=o3kDXzdBUE3ljQXKeTWOMw&m=Ehy5cbFrTOTrtNpj4jTjwnMXspCxyoUuKpn3m8pxGpg&s=iEwPb0T8FqcGV-IscWqa3SAw64L-buGNLYvMLOgWoi4&e=>) > but I have troubles understanding how to use it. Could you please point me > to some documentations or (better) some code examples if any? > > > > Reading the documentation ( > https://llvm.org/docs/CommandGuide/llvm-mca.html > <https://urldefense.proofpoint.com/v2/url?u=https-3A__llvm.org_docs_CommandGuide_llvm-2Dmca.html&d=DwMFAg&c=5VD0RTtNlTh3ycd41b3MUw&r=o3kDXzdBUE3ljQXKeTWOMw&m=Ehy5cbFrTOTrtNpj4jTjwnMXspCxyoUuKpn3m8pxGpg&s=5845DcPA4uSN_lgPE_SlH6XwRSShIfPIvYR1t8AZHpU&e=>) > it also seems that llvm-mca does not take into account the cache hierarchy. > Does this mean that the tool assumes all the loads/stores hit the L1 cache? > > > > Looking forward to hearing from you. > > Best regards, > > > > Lorenzo Chelini. > _______________________________________________ > LLVM Developers mailing list > llvm-dev at lists.llvm.org > https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev > >-------------- next part -------------- An HTML attachment was scrubbed... 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