llvm dev - Feb 2019 - [X86 MIR] Get memory address read in PUSH64rmm

Hi there,

I'm working on an MIR transformation for X86, and I need to get all memory
addresses accessed by any X86 instruction.  I've been using
MachineInstr::memoperands() to iterate over all MachineMemOperands and
using  X86II::getMemoryOperandNo() and X86II::getOperandBias() to get the
index of the base_reg MachineOperand.  This seems to work fine for most
instructions, until I saw the following instruction:

X86: pushq  0x20(%rbx)
MIR: PUSH64rmm renamable $rbx, 1, $noreg, 32, $noreg, implicit-def $rsp,
implicit $rsp

For the above MachineInstr, MachineInstr::getNumMemOperands() returns 0:
there's no MachineMemOperands.  However, this instruction clearly accesses
the memory address specified by [%rbx + 0x20].  I wonder how I can get the
memory addresses for instructions like this?

Thanks!
Yuanfeng Peng
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Hello

Well, I'm afraid I had to disappoint you. The memory operands are
always optional, you cannot rely on their presence. And it's perfectly
fine to have instructions that access memory but do not have memory
operands.

On Sun, Feb 24, 2019 at 10:51 PM Yuanfeng Peng via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
>
> Hi there,
>
> I'm working on an MIR transformation for X86, and I need to get all
memory addresses accessed by any X86 instruction.  I've been using
MachineInstr::memoperands() to iterate over all MachineMemOperands and using 
X86II::getMemoryOperandNo() and X86II::getOperandBias() to get the index of the
base_reg MachineOperand.  This seems to work fine for most instructions, until I
saw the following instruction:
>
> X86: pushq  0x20(%rbx)
> MIR: PUSH64rmm renamable $rbx, 1, $noreg, 32, $noreg, implicit-def $rsp,
implicit $rsp
>
> For the above MachineInstr, MachineInstr::getNumMemOperands() returns 0:
there's no MachineMemOperands.  However, this instruction clearly accesses
the memory address specified by [%rbx + 0x20].  I wonder how I can get the
memory addresses for instructions like this?
>
> Thanks!
> Yuanfeng Peng
> _______________________________________________
> LLVM Developers mailing list
> llvm-dev at lists.llvm.org
> https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev


-- 
With best regards, Anton Korobeynikov
Department of Statistical Modelling, Saint Petersburg State University