llvm dev - Nov 2018 - PowerPC wait encoding is invalid for e500mc

Hello,

Power ISA 2.07B and 3.0B have different encodings for wait instruction
(0x7C00007C vs 0x7C00003C). We happen to partially support the latter, and
mistakingly emit the wrong opcode for targets like e500mc.

I submitted a bugreport at https://bugs.llvm.org/show_bug.cgi?id=39834
<https://bugs.llvm.org/show_bug.cgi?id=39834> with all the necessary
details.

Since I am not familiar with llvm tablegen well enough to quickly write a patch
that will support both variants of the instruction, a fix or a reference on how
to conditionally emit different opcodes will be appreciated.

Best regards,
Vit

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