llvm dev - Dec 2016 - Defining intrinsic with arbitrary number of parameter?

Hi all,

Is there a way to define an intrinsic with arbitrary number of parameters,
but is not var_arg? For example, I want to define an intrinsic
"llvm.foo"
such that I can overload it with two parameters:

i32 llvm.foo.i32.i32.i32(i32, i32)

And overload it with three parameters

i32 llvm.foo.i32.i32.i32.i32(i32, i32, i32)

Thanks a lot
Hongbin
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