llvm dev - Dec 2016 - Inter Ad, CEA Grenoble, France. Optimised LLVM code generation for a RISC-V core extended with adequate-,precision compute units

CEA-LETI, Grenoble
MSc internship 6 months,
Computer Science/Electrical Engineering
Contact: Anca Molnos (anca.molnos at cea.fr)
Damien Courousse (damien.courousse at cea.fr)

Optimised LLVM code generation for a RISC-V core extended with
adequateprecision compute units Today many available processor
architectures give the opportunity to extend their Instruction Set
Architecture (ISA) with specialised units to accelerate
highly-demanded functions, such us, machine learning, data mining,
cryptography. In the embedded systems domain, the RISC-V, a free and
open RISC ISA from University of California, Berkeley
(https://riscv.org), is a notable example in this direction. This open
ISA initiative gains a lot of momentum, and has many industrial and
academic contributors providing core implementation and tools, such
as, an LLVM compiler, hardware simulators.

In this context, the proposed internship addresses the open issue of
how to compile high-level C code to generate highly-efficient
instructions for a specialised accelerator. For this work, the
targeted accelerators are functional units with adequate arithmetic
precision, stemming from the cutting-edge research area of approximate
computing. Adequate or approximate computing is a paradigm in which
the calculations are executed in adequate rather than maximum
precision, in order to accelerate the execution or save power [1]. The
internship is in relation with the ANR/SNF project ARTEFACT
(http://artefact.insa-rennes.fr).

The student's tasks are:

- Familiarise herself/himself with the current RISC-V simulator and
  augment it with few adequateprecision operators/kernels, such as,
  multiplication, division, convolution, required in the cutting edge
  workloads mentioned above. These operators are available, the
  integration work is to be performed. Estimated work effort: 1.5
  month.
- Get acquainted with the existing RISC-V compilation chain and
  augment it with code generation support for the adequate-precision
  operations. Estimated work effort: 2 months.

- Exercise and optimise the code generation for several applications
  from approximate computing benchmarks, e.g., Axbench
  http://axbench.org/. Analyse and compare the performance results
  with existing methods. Estimated work effort: 2 months.

- Document and present the work. This activity will take place during
  the entire duration of the project, with increased focus towards the
  last internship month.

The preferred candidate should have an expertise in software
architecture and compilers, and a background in processor architecture
concepts. She/he should be at ease with classical software programming
environments, e.g., Python, C/C++, and should be strongly motivated to
work in a multi-disciplinary environment such as the one in CEA.

The student will be guided to perform high-quality research and
development in several crucial aspects for an embedded systems expert,
covering software and hardware, and touching upon the integration of
software in widely-utilised open source processor and tools. Moreover,
we aim for publication in an international workshop or conference,
when the results are of sufficient quality.  The internship will be
remunerated.

[1] Sparsh Mittal. 2016. A Survey of Techniques for Approximate
Computing. ACM Comput. Surv. 48, 4, Article 62 (March 2016)


-- 
Damien Couroussé
Research Engineer at CEA-LIST
DRT/LIST/DACLE/SCSN/LIALP
Laboratoire Infrastructures et Ateliers pour le Logiciel sur Puces
Commissariat à l’énergie atomique et aux énergies alternatives

MINATEC Campus | 17 rue des Martyrs | 38054 Grenoble Cedex 9
Tel : +33 (0)4 38 78 04 66
damien.courousse at cea.fr


[Citation aléatoire]
Côme devait le comprendre plus tard : lorsque le problème commun
n'existe plus, les associations perdent leur sens, et mieux vaut alors
être un homme seul qu'un chef.
	-+- Italo Calvino (1923-1985), Le baron perché -+-