llvm dev - Mar 2016 - [LLVM v3.8] Assertion in 'CallingConvLower.cpp' #114

This is actually related to my previous question about supporting
'v16f16'
and 'v4f64' in TableGen.

 

In this case I have a function which returns a 'v8i64' which is
supported,
but even though I have a calling-convention rule for 'v8i64' which
should
place them on the stack, I am getting a collection of return values which
consist of 8 discrete values of type 'i64' and this is overflowing the
number of available registers in the calling convention, and it is not
falling back to placing the extras on the stack.

 

How should the calling-convention rules be written to deal with this, or how
should the lowering operations be stated to make this happen correctly?

 

Thanks,

 

            MartinO

 

-------------- next part --------------
An HTML attachment was scrubbed...
URL:
<http://lists.llvm.org/pipermail/llvm-dev/attachments/20160305/c6450185/attachment.html>