Семен Колтон via llvm-dev
2016-Feb-03 14:28 UTC
[llvm-dev] Disassembler: DisableEncoding with decodePositionallyEncodedOperands=0
Hi, For AMDGPU backend disassembler, I'm finding out that DisableDecoding field has no effect on generated decoder if decodePositionallyEncodedOperands = 0. The same time it works if decodePositionallyEncodedOperands = 1. Is it how it is supposed to work? If yes, what is reason for that? Some details: In lib/Target/AMDGPU/SIInstruction.td DisableEncoding="$src2" is set on instruction V_MAC_F32. I added a warning to the following code in populateInstruction: if (Base != ~0U) OpInfo.addField(Base, Width, Offset); if (OpInfo.numFields() > 0) InsnOperands.push_back(OpInfo); else ; // print warning The warning is displayed for src2 when src2 decodePositionallyEncodedOperands = 0. (the code is not executed with decodePositionallyEncodedOperands = 1) Thanks for any information -- Sam Kolton