> What are you trying to achieve in the end? > > — > Mehdi > >I need to insert extra NOP instructions into the bundle or at least generate a few extra ones during the assembly generation. -- Rail Shafigulin Software Engineer Esencia Technologies -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20151202/67640fdb/attachment.html>
> On Dec 2, 2015, at 5:12 PM, Rail Shafigulin via llvm-dev <llvm-dev at lists.llvm.org> wrote: > > > What are you trying to achieve in the end? > > — > Mehdi > > > > I need to insert extra NOP instructions into the bundle or at least generate a few extra ones during the assembly generation.You shouldn’t need to modify the the MachineFunction to do that. Just emit the extra MCInst directly. The ARM backend does things analogous to this for some of its MC level pseudo-instructions that might prove useful as examples you could adapt.> > -- > Rail Shafigulin > Software Engineer > Esencia Technologies > _______________________________________________ > LLVM Developers mailing list > llvm-dev at lists.llvm.org > http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20151202/ab5c3608/attachment.html>
> You shouldn’t need to modify the the MachineFunction to do that. Just emit > the extra MCInst directly. The ARM backend does things analogous to this > for some of its MC level pseudo-instructions that might prove useful as > examples you could adapt. > >After looking at multiple options this was exactly my conclusion. Do you mind pointing me to the code in ARM that does that? -- Rail Shafigulin Software Engineer Esencia Technologies -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20151202/a8e73c7e/attachment.html>