llvm dev - Nov 2015 - backend bind two machine instructions together

Hi, All,

I lower "BR_CC" into two instructions: one is "CMP", the
other is "Br".
However, when I check the assembly (.s file), I find these two instructions
are separated.  I mean, some other instructions such as "MOVE"
instructions, are inserted between "CMP" and "Br". Is there
a way that I
can always make these "CMP" and "Br" instructions bind
together? Thanks.

Regards,

Xiangyang
-------------- next part --------------
An HTML attachment was scrubbed...
URL:
<http://lists.llvm.org/pipermail/llvm-dev/attachments/20151130/8df09e2e/attachment.html>

> I lower "BR_CC" into two instructions: one is "CMP",
the other is "Br". However, when I check the assembly (.s file), I
find these two instructions are separated.  I mean, some other instructions such
as "MOVE" instructions, are inserted between "CMP" and
"Br". Is there a way that I can always make these "CMP" and
"Br" instructions bind together? Thanks.
 Are your CMP and Br instructions connected with a GLUE edge? If they are
connected with a GLUE edge then they will be placed in the same "scheduling
unit" and no other instructions can be placed between them - AFAIK. A good
starting point is ARMTargetLowering::LowerBR_CC() and the opcode descriptions
for BRCOND and the ARM compare instructions in the ARM backend.

Boris