Rail Shafigulin via llvm-dev
2015-Nov-17 22:23 UTC
[llvm-dev] DFAPacketzer, Hexagon and bundles with 1 instruction
> No. An instruction on its own is equivalent to a bundle with that > instruction only. Also, a BUNDLE must have at least 2 instructions. > > -Krzysztof > > -- > Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted > by The Linux Foundation > _______________________________________________ > LLVM Developers mailing list > llvm-dev at lists.llvm.org > http://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev >I'm a little confused. If a bundle is supposed to have at least 2 instructions, what is the point of VLIWPacketzierList::isSoloInstruction(...)? Say we have an instruction that can't be bundled with anything, how would one form a packet from it? -- R -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20151117/4f7dfdd7/attachment.html>
Krzysztof Parzyszek via llvm-dev
2015-Nov-17 22:35 UTC
[llvm-dev] DFAPacketzer, Hexagon and bundles with 1 instruction
On 11/17/2015 4:23 PM, Rail Shafigulin wrote:> > I'm a little confused. If a bundle is supposed to have at least 2 > instructions, what is the point of > VLIWPacketzierList::isSoloInstruction(...)? Say we have an instruction > that can't be bundled with anything, how would one form a packet from it?In the machine IR, a bundle is a regular instruction, which happens to have other instructions inside of it. A basic block can have bundles mixed with non-bundled instructions. If you iterate over a basic block using MachineBasicBlock::iterator, you will not see the contents of bundles, just the BUNDLE opcode. For stepping into bundles you would need MachineBasicBlock::instr_iterator. When it comes to the encoding of instructions for the hardware, the target-specific object-emission code must handle that properly. That happens later, on a yet another program representation, where instructions are of type MCInst, not MachineInstr. -Krzysztof -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation
Rail Shafigulin via llvm-dev
2015-Nov-17 22:43 UTC
[llvm-dev] DFAPacketzer, Hexagon and bundles with 1 instruction
On Tue, Nov 17, 2015 at 2:35 PM, Krzysztof Parzyszek < kparzysz at codeaurora.org> wrote:> On 11/17/2015 4:23 PM, Rail Shafigulin wrote: > >> >> I'm a little confused. If a bundle is supposed to have at least 2 >> instructions, what is the point of >> VLIWPacketzierList::isSoloInstruction(...)? Say we have an instruction >> that can't be bundled with anything, how would one form a packet from it? >> > > In the machine IR, a bundle is a regular instruction, which happens to > have other instructions inside of it. A basic block can have bundles mixed > with non-bundled instructions. If you iterate over a basic block using > MachineBasicBlock::iterator, you will not see the contents of bundles, just > the BUNDLE opcode. For stepping into bundles you would need > MachineBasicBlock::instr_iterator. > > When it comes to the encoding of instructions for the hardware, the > target-specific object-emission code must handle that properly. That > happens later, on a yet another program representation, where instructions > are of type MCInst, not MachineInstr. > > > -Krzysztof > > -- > Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted > by The Linux Foundation >I see. Thanks. -- R -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20151117/3569e5cd/attachment.html>