llvm dev - Aug 2015 - How to correctly model resource constraints for in-order scheduling model

Hi,

I'm experimenting with the MachineScheduler by providing a subtarget
scheduling model.

Say I have a 2-wide in-order machine that has 2 load/store unit, so I can
issue 2 independent loads per cycle.

By referencing TargetSchedule.td,

it seems like I should do

def MyTargetLdStUnit : ProcResource<2> { let BufferSize = 0 ;}

But right now the scheduler only schedule 1 load/cycle even if there is
another independent load, so I noticed that in

void SchedBoundary::bumpNode(SUnit *SU) in MachineScheduler.cpp

When the scheduler reserve the resource for an instruction, it does not
take the number of units into account,

ReservedCycles[PIdx] = isTop() ? NextCycle + PI->Cycles

Later when the scheduler tries to issue the second load in the same cycle,
 it calls SchedBoundary::checkHazard and reads ReservedCycles[PIdx] which
is next cycle, so it takes the load out from the available queue and push
it into the pending queue.

Is this a bug or I did not model things right

Thanks,
Patrick
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> On Aug 28, 2015, at 8:04 AM, Ziqiang Patrick Huang via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
> 
> Hi, 
> 
> I'm experimenting with the MachineScheduler by providing a subtarget
scheduling model.
> 
> Say I have a 2-wide in-order machine that has 2 load/store unit, so I can
issue 2 independent loads per cycle.
> 
> By referencing TargetSchedule.td, 
> 
> it seems like I should do
> 
> def MyTargetLdStUnit : ProcResource<2> { let BufferSize = 0 ;}
Did you make sure to set the number of micro-ops per cycle to 2?

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