Matt Arsenault via llvm-dev
2015-Aug-08 01:21 UTC
[llvm-dev] [RFC] BasicAA considers address spaces?
On 08/07/2015 06:13 PM, Hal Finkel wrote:> But you seem to be implying that you'll use different address spaces > at the IR level, but that these address spaces will be changed prior > to the target seeing them? Or that the target will internally map them > all to address space 0 (instead of aborting). If the target knows to > do this mapping, it can also understand the aliasing, no?clang performs the mapping from source address space to target address space. See AddrSpaceMap in clang's TargetInfo
Hal Finkel via llvm-dev
2015-Aug-08 01:30 UTC
[llvm-dev] [RFC] BasicAA considers address spaces?
----- Original Message -----> From: "Matt Arsenault" <Matthew.Arsenault at amd.com> > To: "Hal Finkel" <hfinkel at anl.gov>, "Justin Holewinski" <jholewinski at nvidia.com> > Cc: "Jingyue Wu" <jingyue at google.com>, llvm-dev at lists.llvm.org, "Eli Bendersky" <eliben at google.com>, "Xuetian Weng" > <xweng at google.com> > Sent: Friday, August 7, 2015 8:21:27 PM > Subject: Re: [RFC] BasicAA considers address spaces? > > On 08/07/2015 06:13 PM, Hal Finkel wrote: > > But you seem to be implying that you'll use different address > > spaces > > at the IR level, but that these address spaces will be changed > > prior > > to the target seeing them? Or that the target will internally map > > them > > all to address space 0 (instead of aborting). If the target knows > > to > > do this mapping, it can also understand the aliasing, no? > > clang performs the mapping from source address space to target > address > space. See AddrSpaceMap in clang's TargetInfoBut then that's too late for any address-space-based metadata. What you need is just aliasing metadata, which is another matter (and, to some extent, we already have). -Hal>-- Hal Finkel Assistant Computational Scientist Leadership Computing Facility Argonne National Laboratory
escha via llvm-dev
2015-Aug-09 12:46 UTC
[llvm-dev] [RFC] BasicAA considers address spaces?
Personally I feel the most intuitive approach would be to have an equivalent of isTriviallyDisjoint for IR; we already have a model for how it would work, and it could be a TTI call. I’ve kind of wanted this for a while because there’s a lot of address-space-esque aliasing relationships that can’t be easily modeled on the IR level. For example (in our model), we have some constraints like this: Global memory can’t alias local memory. Global writeable memory can’t alias global readonly memory (different address spaces). Stack memory can’t alias global memory (different address spaces). Texture reads cannot alias texture writes, because you can’t bind a texture as readable and writeable at the same time. Texture writes, however, can alias each other. Vertex shader outputs can’t really alias each other, even though they are technically “stores”. (there’s more where that came from) These are all very trivial to express in code (the trivially disjoint function in our backend is like 50 lines of code to cover all the cases), but a few of them are slightly more complex than “address space A can’t alias B”, so having a generic callback might be nicer and more powerful than a “does address space A alias address space B” callback, I think. —escha