llvm dev - Jul 2015 - [LLVMdev] Using TableGen 'foreach' to parameterise definitions

I am trying to simplify a large number of similar but subtly different sets
of instructions.  These are currently spelled out like:

	// First family of instructions called X
	class Group_X_Name_a : ...;
	class Group_X_Name_b : ...;
	multiclass Group_X_Name {
	  def _a : Group_X_Name_a<...>;
	  def _b : Group_X_Name_b<...>;
	}

	defm Prefix_X_1 : Group_X_Name<...>;
	defm Prefix_X_2 : Group_X_Name<...>;
	...
	defm Prefix_X_N : Group_X_Name<...>;

	// Second family of instructions called Y
	class Group_Y_Name_a : ...;
	class Group_Y_Name_b : ...;
	multiclass Group_Y_Name {
	  def _a : Group_Y_Name_a<...>;
	  def _b : Group_Y_Name_b<...>;
	}

	defm Prefix_Y_1 : Group_Y_Name<...>;
	defm Prefix_Y_2 : Group_Y_Name<...>;
	...
	defm Prefix_Y_N : Group_Y_Name<...>;

I thought that I could reduce this to a more simple form as follows:

	// Types for first family of instructions called X as before
	class Group_X_Name_a : ...;
	class Group_X_Name_b : ...;
	multiclass Group_X_Name {
	  def _a : Group_X_Name_a<...>;
	  def _b : Group_X_Name_b<...>;
	}

	// Types for second family of instructions called Y as before
	class Group_Y_Name_a : ...;
	class Group_Y_Name_b : ...;
	multiclass Group_Y_Name {
	  def _a : Group_Y_Name_a<...>;
	  def _b : Group_Y_Name_b<...>;
	}

	// Use 'foreach' to share the main set of definitions
	foreach instGroup = [ "X", "Y" ] in {
	  defm Prefix_#instrGroup#_1 : Group_#instrGroup#_Name<...>;
	  defm Prefix_#instrGroup#_2 : Group_#instrGroup#_Name<...>;
	  ...
	  defm Prefix_#instrGroup#_N : Group_#instrGroup#_Name<...>;
	}                              ^^^^^^^^^^^^^^^^^^^^^^^

However, while I can name the instruction 'Prefix_#instrGroup#_N' in
this
way, TableGen does not seem to accept the type-name
'Group_#instrGroup#_Name' being composed in the same way.  I had
expected it
to just use token-pasting to compose the type-name.

The example above is greatly simplified from my actual code which has 5
groups and about 50 instructions, so the ability to parameterise the
"common
part" would greatly reduce the amount of repetition in my existing TableGen
descriptions, while at the same time guaranteeing that all 5 groups
consistently provide the 50 instructions.

Is there anyway of describing this kind of template in TableGen or is it
just not possible?

Thanks,

	MartinO
_______________________________________________________________________
Martin J. O'Riordan                Email:  Martin.ORiordan at movidius.com
Compiler Development               Web:    www.movidius.com
Movidius Ltd.                      Skype:  moviMartinO
1st Floor,  O'Connell Bridge House,  d'Olier Street,  Dublin 2, Ireland