Hi all,Im writing a pass just before the register allocator in which Im inserting a sequence of new instructions.I do this by calling subsequently for a number of times BuildMI.As a result I see that there is a dependency between the produced instructions which shouldnt be there as the instructions are not data dependent.Can anybody tell me how to avoid getting the dependency?thanks,Alex -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150703/22a3b4bc/attachment.html>
Alex Turjan
2015-Jul-03 18:38 UTC
[LLVMdev] Fw: Sequence of BuildMI without order dependency
Hi all,Im writing a pass just before the register allocator in which Im inserting a sequence of new instructions.I do this by calling subsequently for a number of times BuildMI.As a result I see that there is a dependency between the produced instructions which shouldnt be there as the instructions are not data dependent.Can anybody tell me how to avoid getting the dependency?thanks,Alex -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150703/67d11825/attachment.html>
Tim Northover
2015-Jul-03 23:31 UTC
[LLVMdev] Sequence of BuildMI without order dependency
> As a result I see that there is a dependency between the produced > instructions which shouldnt be there as the instructions are not data dependent. > Can anybody tell me how to avoid getting the dependency?What are you seeing that makes you think there's a dependency being formed? Tim.