Jyoti Rajendra Allur
2015-Jun-01 10:05 UTC
[LLVMdev] [ARM backend] adding pattern for SMLALBB
Hi Tim, In that case, we should probably remove the definitions for SMLALBB, SMLALBT, SMLALTB, SMLALTT from ARMInstrInfo.td file and add those instructions in ARMISD nodetypes? It looks like we can access SMLALBB instruction from C++ only if it's present in ARMISD, is it not ? Could you please explain "There is no smlal TableGen node, there's an SMLAL instruction" Regards, Jyoti Allur ------- Original Message ------- Sender : Tim Northover<t.p.northover at gmail.com> Date : May 28, 2015 23:46 (GMT+05:30) Title : Re: [ARM backend] adding pattern for SMLALBB Hi Jyoti,> Obviously something is wrong in this pattern, I have not figured out what that is ?The biggest problem is you're trying to define two separate values (RdLo and RdHi). I don't think TableGen supports that yet (I thought someone had done something recently, but can't find any trace of it). If so, you'll need to use C++ to match those patterns.> def : ARMV5MOPat<(smlal GPRnopc:$RdLo, GPRnopc:$RdHi, > (sra (shl GPR:$a, (i32 24)), (i32 24)), > (sra (shl GPR:$b, (i32 24)), (i32 24))), > (SMLALBB GPRnopc:$RdLo, GPRnopc:$RdHi, GPRnopc:$Rn, GPRnopc:Rm)>; > > This throws "Variable not defined: 'smlal'There is no smlal TableGen node, there's an SMLAL instruction, but you can't use that as part of an input pattern because selection occurs only once and bottom-up. Again, I think C++ is your only option here (the 64-bit values are just not legal enough to effectively use TableGen on). Cheers. Tim. <p> </p><p> </p>
Hi Jyoti, On 1 June 2015 at 03:05, Jyoti Rajendra Allur <jyoti.allur at samsung.com> wrote:> In that case, we should probably remove the definitions for SMLALBB, SMLALBT, SMLALTB, SMLALTT from ARMInstrInfo.td file and add those instructions in ARMISD nodetypes?Maybe ARMSmlal & ARMUmlal if you can't get them to work (they're currently unused). But as you've noticed the instructions themselves need to stay.> It looks like we can access SMLALBB instruction from C++ only if it's present in ARMISD, is it not ?That's correct. ARMInstrInfo.td is what tells LLVM the instruction exists in the first place (how to print it, how to encode it, how to parse it from assembly).> Could you please explain "There is no smlal TableGen node, there's an SMLAL instruction"Looks like that was wrong. ARMISD::SMLAL does exist, and an ARMSmlal stub too. You might be able to select them from TableGen in limited forms (probably only from a "def Pat", and don't get too tricksy), since they hide away the 64-bit result. This works, for example: def : Pat<(ARMSmlal GPR:$Rn, GPR:$Rm, GPR:$RLo, GPR:$RHi), (SMLAL GPR:$Rn, GPR:$Rm, GPR:$RLo, GPR:$RHi)>, Requires<[IsARM, HasV6]>; It's possible the C++ in ISelDAGToDAG was written before TableGen could do anything at all with those, though you'd have to delve into the git log to have any chance of certainty. Cheers. Tim.