Hi, We have this line in micromips-16-bit-instructions.s # CHECK-EB: addu16 $6, $17, $4 # encoding: [0x07,0x42] However, when I check this with llvm-mc, like below, I dont get back the assembly. This is against the latest LLVM code. What is wrong here? Thanks, Jun $ echo "0x07,0x42"|./Release+Asserts/bin/llvm-mc -disassemble -triple=mips -show-encoding -mattr=micromips .text <stdin>:1:1: warning: invalid instruction encoding 0x07,0x42 ^ <stdin>:1:6: warning: invalid instruction encoding 0x07,0x42 -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20141029/735ea723/attachment.html>
Hi, I've had a quick look through MipsDisassembler.cpp and it seems that the disassembler doesn't know anything about 16-bit instructions at the moment. The two main problems are that DecoderTableMicroMips16 (which contains ADDU16_MM) is never used, and the disassembler always reads the opcode as a 4-byte value. Vladimir/Sasa/Jozef/Zoran: I don't know much about the microMIPS encodings at the moment. Do you have the details on distinguishing 16-bit from 32-bit instructions? ________________________________ From: Jun Koi [junkoi2004 at gmail.com] Sent: 29 October 2014 14:46 To: Daniel Sanders Cc: llvmdev at cs.uiuc.edu Subject: Mips's MicroMips ?? Hi, We have this line in micromips-16-bit-instructions.s # CHECK-EB: addu16 $6, $17, $4 # encoding: [0x07,0x42] However, when I check this with llvm-mc, like below, I dont get back the assembly. This is against the latest LLVM code. What is wrong here? Thanks, Jun $ echo "0x07,0x42"|./Release+Asserts/bin/llvm-mc -disassemble -triple=mips -show-encoding -mattr=micromips .text <stdin>:1:1: warning: invalid instruction encoding 0x07,0x42 ^ <stdin>:1:6: warning: invalid instruction encoding 0x07,0x42 -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20141102/a64bf954/attachment.html>
Hello Daniel, At the moment we are preparing the patch for disassembling microMIPS 16 bit instructions and it will be on Phabricator tomorrow or on Wednesday. Functionality is implemented in MipsDisassembler::getInstruction where first two bytes are read and decodeInstruction is called with DecoderTableMicroMips16 and only if it fails we read 4 bytes and call decodeInstruction with DecoderTableMicroMips32. Regards, Zoran ________________________________ From: Daniel Sanders Sent: Sunday, November 02, 2014 5:49 PM To: Jun Koi; Vladimir Medic; Sasa Stankovic; Jozef Kolek; Zoran Jovanovic Cc: llvmdev at cs.uiuc.edu Subject: RE: Mips's MicroMips ?? Hi, I've had a quick look through MipsDisassembler.cpp and it seems that the disassembler doesn't know anything about 16-bit instructions at the moment. The two main problems are that DecoderTableMicroMips16 (which contains ADDU16_MM) is never used, and the disassembler always reads the opcode as a 4-byte value. Vladimir/Sasa/Jozef/Zoran: I don't know much about the microMIPS encodings at the moment. Do you have the details on distinguishing 16-bit from 32-bit instructions? ________________________________ From: Jun Koi [junkoi2004 at gmail.com] Sent: 29 October 2014 14:46 To: Daniel Sanders Cc: llvmdev at cs.uiuc.edu Subject: Mips's MicroMips ?? Hi, We have this line in micromips-16-bit-instructions.s # CHECK-EB: addu16 $6, $17, $4 # encoding: [0x07,0x42] However, when I check this with llvm-mc, like below, I dont get back the assembly. This is against the latest LLVM code. What is wrong here? Thanks, Jun $ echo "0x07,0x42"|./Release+Asserts/bin/llvm-mc -disassemble -triple=mips -show-encoding -mattr=micromips .text <stdin>:1:1: warning: invalid instruction encoding 0x07,0x42 ^ <stdin>:1:6: warning: invalid instruction encoding 0x07,0x42 -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20141103/4a859ec1/attachment.html>