Have a look at how the ARM backend handles the CPSR register. It sounds like what you're really looking for is liveness of that status register not to be clobbered between the arithmetic instruction you're inspecting and the instruction that reads that register. Cheers, Jon On 9/30/14 12:39 PM, Jingyue Wu wrote:> I can't think of any NVPTX intrinsic that disallow even arithmetic > instructions. > > If you are trying to read some special registers in PTX, can you use inline > assembly and mark it as having side effects? I think LLVM's optimizer is > very conservative about inline assembly marked with sideeffect, and will > probably solve your code motion issue. > > Jingyue > > On Tue Sep 30 2014 at 11:03:45 AM RAVI KORSA <ravi.korsa at gmail.com> wrote: > >> The actual purpose that I wanted such an intrinsic is to solve a problem >> similar to this one in X86. Say I wanted to read the "mxcsr" register(which >> is the status register for SSE instructions) after a particular >> instruction, then I need a kind of barrier intrinsic which will not allow >> the arithmetic instructions to move around it. Or else I will be reading >> the status of some other instruction. >> >> Thanks >> > > > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev >
I understand that. Once the control reaches the target back-end, I can disallow instructions moving around an intrinsic by defining an SDNode for the intrinsic, setting it's properties appropriately and custom lowering it etc. But my question was aimed at how do we stop the "opt" passes from moving the arithmetic instructions around the intrinsic. For example we have "llvm.arm.set.fpscr" intrinsic to set the rounding mode of the arithmetic instructions following it. But if "opt" passes move arithmetic instructions around it, then the expected results are wrong. Am trying to check if anyone has a solution for this already. Thanks. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20141001/40fc375f/attachment.html>
This issue comes up every once in a while, see for example: http://lists.cs.uiuc.edu/pipermail/llvmdev/2014-January/069767.html Or, for something much older: http://llvm.org/bugs/show_bug.cgi?id=6393 The bottom line is that, unfortunately, there is no good way to enforce that at the IR level. From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of RAVI KORSA Sent: Wednesday, October 01, 2014 10:50 To: Jonathan Roelofs Cc: LLVM Developers Mailing List Subject: Re: [LLVMdev] Behaviour of NVPTX intrinsic I understand that. Once the control reaches the target back-end, I can disallow instructions moving around an intrinsic by defining an SDNode for the intrinsic, setting it's properties appropriately and custom lowering it etc. But my question was aimed at how do we stop the "opt" passes from moving the arithmetic instructions around the intrinsic. For example we have "llvm.arm.set.fpscr" intrinsic to set the rounding mode of the arithmetic instructions following it. But if "opt" passes move arithmetic instructions around it, then the expected results are wrong. Am trying to check if anyone has a solution for this already. Thanks. --------------------------------------------------------------------- Intel Israel (74) Limited This e-mail and any attachments may contain confidential material for the sole use of the intended recipient(s). Any review or distribution by others is strictly prohibited. If you are not the intended recipient, please contact the sender and delete all copies. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20141002/e50cbdd8/attachment.html>