llvm dev - Jul 2014 - [LLVMdev] Balancing the registers

Hi,

In our custom device, we keep the registers in two different places, one
for the odd-numbered registers and one for the even-numbered registers. To
fetch the data quickly, the registers in an instruction should be balanced.
For example, if an instruction contains 2 odd-numbered regs and 2
even-numbered regs, they can be fetched in one cycle.

Is it possible to enforce LLC to balance the registers as above?

Volkan
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Hi Volkan,

Take a look at the TargetRegisterInfo::getRegAllocationHints() callback.  This
callback allows you to, at the time RA wants to assign a physical register to a
virtual register, return a prioritized list of registers it should consider. 
For your situation, you could look at any physical registers already assigned to
the same instruction and return a prioritized list based on that.  Be careful of
over using this, as you can end up regressing code quality or compile time if
you send RA down a pointless rabbit hole too often.

—Owen

On Jul 30, 2014, at 7:11 AM, Volkan Keleş <vlknkls at gmail.com> wrote:
> Hi,
> 
> In our custom device, we keep the registers in two different places, one
for the odd-numbered registers and one for the even-numbered registers. To fetch
the data quickly, the registers in an instruction should be balanced. For
example, if an instruction contains 2 odd-numbered regs and 2 even-numbered
regs, they can be fetched in one cycle.
> 
> Is it possible to enforce LLC to balance the registers as above?
> 
> Volkan
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