Yeah.
I agree that "Chain operand is needed if the intrinsic is reading / writing
memory.”,
Just don’t know where and how to set it up.
like intrinsic “int_x86_xtest:
“
def int_x86_xtest : GCCBuiltin<"__builtin_ia32_xtest">,
Intrinsic<[llvm_i32_ty], [], []>;
“
"def X86xtest: SDNode<"X86ISD::XTEST", SDTypeProfile<1, 0,
[SDTCisVT<0, i32>]>,
[SDNPHasChain, SDNPSideEffect]>;
“
let Defs = [EFLAGS] in
def XTEST : I<0x01, MRM_D6, (outs), (ins),
"xtest", [(set EFLAGS, (X86xtest))]>, TB,
Requires<[HasTSX]>;
which CALL makes the “Intrinsic::x86_xtest” is caught under
“INTRINSIC_W_CHAIN”? feel I missed something, but did not figure out.
tks
kevin
On Jul 23, 2014, at 1:16 PM, Anton Korobeynikov <anton at
korobeynikov.info> wrote:
> Hello
>
> Chain operand is needed if the intrinsic is reading / writing memory.
>
> On Wed, Jul 23, 2014 at 8:02 PM, kewuzhang <kewu.zhang at amd.com>
wrote:
>> Hi guys,
>>
>> In X86ISelLowering.cpp
>>
>> I saw”
>> ...
>> case Intrinsic::x86_rdrand_16:
>> case Intrinsic::x86_rdrand_32:
>> ….
>> case Intrinsic::x86_avx512_gather_qpd_512:
>> case Intrinsic::x86_avx512_gather_qps_512:
>> ..
>> “
>> those intrinsics are handled by “LowerINTRINSIC_W_CHAIN”.
>>
>> How the “INTRINSIC_W_CHAIN” opCode is set instead of
“INTRINSIC_WO_CHAIN”?
>>
>> tks
>>
>> Kevin
>>
>>
>>
>>
>>
>>
>> _______________________________________________
>> LLVM Developers mailing list
>> LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu
>> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
>>
>
>
>
> --
> With best regards, Anton Korobeynikov
> Faculty of Mathematics and Mechanics, Saint Petersburg State University
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> def int_x86_xtest : GCCBuiltin<"__builtin_ia32_xtest">, > Intrinsic<[llvm_i32_ty], [], []>; > > which CALL makes the “Intrinsic::x86_xtest” is caught under > “INTRINSIC_W_CHAIN”? feel I missed something, but did not figure out.It's this first definition that spawns the INTRINSIC_W_CHAIN. The rest are x86-specific SDNodes, defined in X86ISelLowering.h and only ever created from X86ISelLowering.cpp. I assume (haven't checked) there's some special bit of X86ISelLowering.cpp that takes an ISD::INTRINSIC_W_CHAIN node referring to the int_x86_xtest intrinsic and turns it into an X86ISD::XTEST node. Specifically, for the W_CHAIN/WO_CHAIN distinction you want to be looking at the "IntrNoMem" definition and uses in include/[1]. That should be what determines which path an intrinsic goes down. Cheers. Tim. [1] If you're interested, the code most directly responsible for choosing between them is in visitTargetIntrinsic in lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp. It's helped by TableGen and other components, of course.
Thanks Tim, Yeah!, you are right! Also, looks we have to set up a pattern to use the intrinsic node too. I did something like this:> def int_my_test : Intrinsic > <llvm_i32_ty], [llvm_i32_ty, llvm_i32_ty], > [IntrReadWriteArgMem], > >;and used it directly with the test call "call<float> @my.test( <float> %r0, <float> *%p1)." It compiles fine. and “int_my_test" intrinsic is caught under INTRINSIC_WO_CHAIN. Because anyway I have to handle this intrinsic by lowering, I did not think a pattern is necessary. Just left a [ ] there, looks we have to put something there even it is not really needed. but then the argument is: is it really necessary to put a pattern for it? For my case, because I need to access memory, I think a chain is necessary. but what type of pattern is meaningful? for example intrinsic “ float llvm.my.sincos( float src, *float res)”, sin result is returned, and cos result is write back to the second pointer argument. tks kevin On Jul 23, 2014, at 3:56 PM, Tim Northover <t.p.northover at gmail.com> wrote:>> def int_x86_xtest : GCCBuiltin<"__builtin_ia32_xtest">, >> Intrinsic<[llvm_i32_ty], [], []>; >> >> which CALL makes the “Intrinsic::x86_xtest” is caught under >> “INTRINSIC_W_CHAIN”? feel I missed something, but did not figure out. > > It's this first definition that spawns the INTRINSIC_W_CHAIN. The rest > are x86-specific SDNodes, defined in X86ISelLowering.h and only ever > created from X86ISelLowering.cpp. > > I assume (haven't checked) there's some special bit of > X86ISelLowering.cpp that takes an ISD::INTRINSIC_W_CHAIN node > referring to the int_x86_xtest intrinsic and turns it into an > X86ISD::XTEST node. > > Specifically, for the W_CHAIN/WO_CHAIN distinction you want to be > looking at the "IntrNoMem" definition and uses in include/[1]. That > should be what determines which path an intrinsic goes down. > > Cheers. > > Tim. > > [1] If you're interested, the code most directly responsible for > choosing between them is in visitTargetIntrinsic in > lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp. It's helped by > TableGen and other components, of course.-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20140724/f9032c23/attachment.html>