Wan, Xiaofei
2014-Jul-10 07:53 UTC
[LLVMdev] Help!!!!Help!!!! " LLVM ERROR: Cannot select: 0x9fc9680: i32 = fp32_to_fp16 0x9fc0750 [ID=16] " problem!!!!!!!!!!!!!!!!!!
You may need implement these two functions in your runtime environment '__gnu_f2h_ieee' and '__gnu_h2f_ieee' From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of yalong at multicorewareinc.com Sent: Friday, July 11, 2014 6:49 AM To: Andrea Di Biagio; Matt Arsenault Cc: llvmdev Subject: Re: [LLVMdev] Help!!!!Help!!!! " LLVM ERROR: Cannot select: 0x9fc9680: i32 = fp32_to_fp16 0x9fc0750 [ID=16] " problem!!!!!!!!!!!!!!!!!! Hi Andrea Thank you your replying. I do like your letter. Add following to line to MipsISelLowering.cpp. As your words, @llvm.convert.to.fp16 can compile successfully. However, the runtime is not right. + setOperationAction(ISD::FP16_TO_FP32, MVT::f32, Expand); + setOperationAction(ISD::FP32_TO_FP16, MVT::i32, Expand); Robin ________________________________ yalong at multicorewareinc.com<mailto:yalong at multicorewareinc.com> From: Andrea Di Biagio<mailto:andrea.dibiagio at gmail.com> Date: 2014-07-09 14:20 To: Matt Arsenault<mailto:Matthew.Arsenault at amd.com> CC: yalong at multicorewareinc.com<mailto:yalong at multicorewareinc.com>; Kevin Qin<mailto:kevinqindev at gmail.com>; llvmdev<mailto:llvmdev at cs.uiuc.edu> Subject: Re: [LLVMdev] Help!!!!Help!!!! " LLVM ERROR: Cannot select: 0x9fc9680: i32 = fp32_to_fp16 0x9fc0750 [ID=16] " problem!!!!!!!!!!!!!!!!!! Not sure if this can help, but if you really really want to have minimal half float support on Mips, then one thing you could try to do is to hack MipsISelLowering.cpp adding rules to expand float-half conversion SDNodes into library calls. + setOperationAction(ISD::FP16_TO_FP32, MVT::f32, Expand); + setOperationAction(ISD::FP32_TO_FP16, MVT::i32, Expand); (The MVT::i32 on the second rule is required because type i16 is promoted to i32). If you then convert every occurrence of 'fptrunc' from float to half with calls to @llvm.convert.to.fp16, then you should be able to compile (hopefully) with no errors. That means, in your original example you would convert the following IR statement: %Vt3_1 = fptrunc float %Vt_2 to half into %Vt3_1 = call i16 @llvm.convert.to.fp16(float %Vt_2) The downside is that you will have to add definitions for '__gnu_f2h_ieee' and '__gnu_h2f_ieee' in the compiler runtime. That is because the backend will expand all the float-half conversions into library calls... This workaround should work assuming that a) you can hack the backend, and b) it is acceptable (i.e. a reasonable solution in your case) to have a library call for every float-half conversion in your code. On Wed, Jul 9, 2014 at 8:51 PM, Matt Arsenault <Matthew.Arsenault at amd.com<mailto:Matthew.Arsenault at amd.com>> wrote:> I think that support for the half type is only implemented for ARM. Last I > tried to use it, I found that none of it works even on x86, and the current > handling of the half conversion SDNodes seem to rely on ARM specific > assumptionsJust for the record, since revision 212293 (committed only five days ago), the x86 backend supports float half conversions. On x86, if the target has F16C, there are ISel patterns to map float-half conversions to specific instructions. If there is no F16C support, then the backend expands float-half conversions into runtime library calls. Cheers, Andrea -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20140710/4ae33c05/attachment.html>
yalong at multicorewareinc.com
2014-Jul-10 22:48 UTC
[LLVMdev] Help!!!!Help!!!! " LLVM ERROR: Cannot select: 0x9fc9680: i32 = fp32_to_fp16 0x9fc0750 [ID=16] " problem!!!!!!!!!!!!!!!!!!
Hi Andrea Thank you your replying. I do like your letter. Add following to line to MipsISelLowering.cpp. As your words, @llvm.convert.to.fp16 can compile successfully. However, the runtime is not right. + setOperationAction(ISD::FP16_TO_FP32, MVT::f32, Expand);+ setOperationAction(ISD::FP32_TO_FP16, MVT::i32, Expand); Robin yalong at multicorewareinc.com From: Andrea Di BiagioDate: 2014-07-09 14:20To: Matt ArsenaultCC: yalong at multicorewareinc.com; Kevin Qin; llvmdevSubject: Re: [LLVMdev] Help!!!!Help!!!! " LLVM ERROR: Cannot select: 0x9fc9680: i32 = fp32_to_fp16 0x9fc0750 [ID=16] " problem!!!!!!!!!!!!!!!!!!Not sure if this can help, but if you really really want to have minimal half float support on Mips, then one thing you could try to do is to hack MipsISelLowering.cpp adding rules to expand float-half conversion SDNodes into library calls. + setOperationAction(ISD::FP16_TO_FP32, MVT::f32, Expand); + setOperationAction(ISD::FP32_TO_FP16, MVT::i32, Expand); (The MVT::i32 on the second rule is required because type i16 is promoted to i32). If you then convert every occurrence of 'fptrunc' from float to half with calls to @llvm.convert.to.fp16, then you should be able to compile (hopefully) with no errors. That means, in your original example you would convert the following IR statement: %Vt3_1 = fptrunc float %Vt_2 to half into %Vt3_1 = call i16 @llvm.convert.to.fp16(float %Vt_2) The downside is that you will have to add definitions for '__gnu_f2h_ieee' and '__gnu_h2f_ieee' in the compiler runtime. That is because the backend will expand all the float-half conversions into library calls... This workaround should work assuming that a) you can hack the backend, and b) it is acceptable (i.e. a reasonable solution in your case) to have a library call for every float-half conversion in your code. On Wed, Jul 9, 2014 at 8:51 PM, Matt Arsenault <Matthew.Arsenault at amd.com> wrote:> I think that support for the half type is only implemented for ARM. Last I > tried to use it, I found that none of it works even on x86, and the current > handling of the half conversion SDNodes seem to rely on ARM specific > assumptionsJust for the record, since revision 212293 (committed only five days ago), the x86 backend supports float half conversions. On x86, if the target has F16C, there are ISel patterns to map float-half conversions to specific instructions. If there is no F16C support, then the backend expands float-half conversions into runtime library calls. Cheers, Andrea -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20140710/c0df4b12/attachment.html>
yalong at multicorewareinc.com
2014-Jul-10 23:06 UTC
[LLVMdev] Help!!!!Help!!!! " LLVM ERROR: Cannot select: 0x9fc9680: i32 = fp32_to_fp16 0x9fc0750 [ID=16] " problem!!!!!!!!!!!!!!!!!!
Hi Wan,Xiaofei, Thank you your replying. I see the letter of Andrea, This only resolve translate bug, but no runtime. I will do some research about '__gnu_f2h_ieee' and '__gnu_h2f_ieee'. Then implement them.Cheer,Robin yalong at multicorewareinc.com From: Wan, XiaofeiDate: 2014-07-10 00:53To: yalong at multicorewareinc.com; Andrea Di Biagio; Matt ArsenaultCC: llvmdevSubject: RE: [LLVMdev] Help!!!!Help!!!! " LLVM ERROR: Cannot select: 0x9fc9680: i32 = fp32_to_fp16 0x9fc0750 [ID=16] " problem!!!!!!!!!!!!!!!!!! You may need implement these two functions in your runtime environment '__gnu_f2h_ieee' and '__gnu_h2f_ieee' From: llvmdev-bounces at cs.uiuc.edu [mailto:llvmdev-bounces at cs.uiuc.edu] On Behalf Of yalong at multicorewareinc.com Sent: Friday, July 11, 2014 6:49 AM To: Andrea Di Biagio; Matt Arsenault Cc: llvmdev Subject: Re: [LLVMdev] Help!!!!Help!!!! " LLVM ERROR: Cannot select: 0x9fc9680: i32 = fp32_to_fp16 0x9fc0750 [ID=16] " problem!!!!!!!!!!!!!!!!!! Hi Andrea Thank you your replying. I do like your letter. Add following to line to MipsISelLowering.cpp. As your words, @llvm.convert.to.fp16 can compile successfully. However, the runtime is not right. + setOperationAction(ISD::FP16_TO_FP32, MVT::f32, Expand); + setOperationAction(ISD::FP32_TO_FP16, MVT::i32, Expand); Robin yalong at multicorewareinc.com From: Andrea Di Biagio Date: 2014-07-09 14:20 To: Matt Arsenault CC: yalong at multicorewareinc.com; Kevin Qin; llvmdev Subject: Re: [LLVMdev] Help!!!!Help!!!! " LLVM ERROR: Cannot select: 0x9fc9680: i32 = fp32_to_fp16 0x9fc0750 [ID=16] " problem!!!!!!!!!!!!!!!!!! Not sure if this can help, but if you really really want to have minimal half float support on Mips, then one thing you could try to do is to hack MipsISelLowering.cpp adding rules to expand float-half conversion SDNodes into library calls. + setOperationAction(ISD::FP16_TO_FP32, MVT::f32, Expand); + setOperationAction(ISD::FP32_TO_FP16, MVT::i32, Expand); (The MVT::i32 on the second rule is required because type i16 is promoted to i32). If you then convert every occurrence of 'fptrunc' from float to half with calls to @llvm.convert.to.fp16, then you should be able to compile (hopefully) with no errors. That means, in your original example you would convert the following IR statement: %Vt3_1 = fptrunc float %Vt_2 to half into %Vt3_1 = call i16 @llvm.convert.to.fp16(float %Vt_2) The downside is that you will have to add definitions for '__gnu_f2h_ieee' and '__gnu_h2f_ieee' in the compiler runtime. That is because the backend will expand all the float-half conversions into library calls... This workaround should work assuming that a) you can hack the backend, and b) it is acceptable (i.e. a reasonable solution in your case) to have a library call for every float-half conversion in your code. On Wed, Jul 9, 2014 at 8:51 PM, Matt Arsenault <Matthew.Arsenault at amd.com> wrote:> I think that support for the half type is only implemented for ARM. Last I> tried to use it, I found that none of it works even on x86, and the current> handling of the half conversion SDNodes seem to rely on ARM specific> assumptionsJust for the record, since revision 212293 (committed only five days ago), the x86 backend supports float half conversions. On x86, if the target has F16C, there are ISel patterns to map float-half conversions to specific instructions. If there is no F16C support, then the backend expands float-half conversions into runtime library calls. Cheers, Andrea -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20140710/2d307544/attachment.html>