Actually, my problem is about the formal parameters. It adds 4 to base
address.
C Code:
void foo(int *dst,int *src){
dst[0] = src[0] + src[1];
}
Assembly Code:
! BB#0:
addi $R2, $RSP, #4
stram $R2, $R60
addi $R3, $RSP, #0
stram $R3, $R61
addi $R3, $R61, #4
ldram $R3, $R3
ldram $R4, $R61
add $R3, $R4, $R3
ldram $R2, $R2
stram $R2, $R3
2014-06-20 17:41 GMT+03:00 Tom Stellard <tom at stellard.net>:
> On Fri, Jun 20, 2014 at 05:07:47PM +0300, Ramin Guner wrote:
> > Hi all,
> >
> > All of the data types are 32 bits and the pointer is 32 bit.
Therefore, I
> > need word adressing instead of byte adressing to use 8 GB memory.
> >
> > I was told that R600 uses word adressing and I looked at its codes but
I
> > could not find where the backends handles word adressing.
> >
> > Do you have any ideas about it?
> >
>
> See the function R600TargetLowering::LowerSTORE() in R600ISelLowering.cpp.
>
> The lowering on R600 looks like this:
>
> (store $val, $ptr) -> (store $val (DWORDADDR (srl $ptr, 2)))
>
> DWORDADDR is just a placeholder node to indicate that the pointer has
> already been converted to dword addressing. It is discarded during
> instruction selection.
>
> -Tom
>
> > Thanks in advance.
>
> > _______________________________________________
> > LLVM Developers mailing list
> > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu
> > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
>
>
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