llvm dev - May 2014 - [LLVMdev] Partially complete LLVM backend for the VideoCore 4

On 5/29/14, 12:12 PM, Alex Bradbury wrote:
[...]
> Congratulations on the release David, this looks very interesting. I
> had wondering what you were targeting given your series of questions
> to the mailing list :)
Yeah, it is a kind of distinctive architecture. Did I mention the
condition codes? It's got condition codes...

It's a lovely thing to write hand assembly in, by the way. The ARM used
to be my favourite processor; no more. (Have I mentioned the 64x64xbyte
DSP vector storage? On which you can perform SIMD operations on
arbitrary horizontal or vertical slices with full integration with the ALU?)

It's just a shame I didn't get it any more finished; the LLVM learning
curve is really steep, and the documentation is, with all the best will
in the world, deeply inadequate. There are lots of rough edges and
things that you expect should work by don't, and there's a painful
amount of boilerplate. It was really surprising how frequently I had to
resort to manually matching patterns in C++ rather than using TableGen's
patterns.

This is actually my third attempt at a VC4 compiler; the first was the
ACK, which was straightforward but generates shockingly bad code; and
the second was gcc. Comparing retargeting gcc vs LLVM is interesting.
gcc has better documentation and, I think, a better templating system
(it does more and requires less manual code), but it's got *way* more
magic, and trying to figure out what was wrong when it inevitably did go
wrong was practically impossible. The community wasn't much help either.
(I eventually got it generating code, but the stack frames were
hopelessly mangled and I never did figure out what was wrong. gcc's
frame pointer elimination is... exciting.)

[...]
> http://www.raspberrypi.org/a-birthday-present-from-broadcom/).
Yes, the QPU is really interesting. Unfortunately I prefer my processors
to have... how do I put it... memory operations!

-- 
┌─── ｄｇ＠ｃｏｗｌａｒｋ．ｃｏｍ ───── http://www.cowlark.com ─────
│
│ "You cannot truly appreciate _Atlas Shrugged_ until you have read it
│ in the original Klingon." --- Sea Wasp on r.a.sf.w

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On 29 May 2014, at 21:34, David Given <dg at cowlark.com> wrote:
> Have I mentioned the 64x64xbyte
> DSP vector storage? On which you can perform SIMD operations on
> arbitrary horizontal or vertical slices with full integration with the ALU?
If you like that, you should take a look at recent Intel CPUs, which also allow
diagonal stripes through the register set for SIMD operations...

David

On 30 May 2014, at 09:37, David Chisnall <David.Chisnall at cl.cam.ac.uk>
wrote:
> If you like that, you should take a look at recent Intel CPUs, which also
allow diagonal stripes through the register set for SIMD operations...
Uh, fingers autocorrected.  Intel *GPUs*.

David