What is the purpose of tablegen created files for fast-isel?
If I make the following change to Makefile in lib/Target/Mips
BUILT_SOURCES = MipsGenRegisterInfo.inc MipsGenInstrInfo.inc \
MipsGenAsmWriter.inc MipsGenCodeEmitter.inc \
MipsGenDAGISel.inc MipsGenCallingConv.inc \
- MipsGenSubtargetInfo.inc MipsGenMCCodeEmitter.inc \
+ MipsGenSubtargetInfo.inc MipsGenFastISel.inc
MipsGenMCCodeEmitter.inc \
MipsGenDisassemblerTables.inc \
MipsGenMCPseudoLowering.inc MipsGenAsmMatcher.inc
I get an error.
Included from
/home/rkotler/workspace/llvm/lib/Target/Mips/MipsInstrInfo.td:1474:
/home/rkotler/workspace/llvm/lib/Target/Mips/Mips64InstrInfo.td:89:1:
error: Duplicate record in FastISel table!
def DSUB : ArithLogicR<"dsub", GPR64Opnd, 0, II_DSUB, sub>,
ADD_FM<0,
0x2e>;
^
make[3]: ***
[/home/rkotler/llvmw/build/lib/Target/Mips/Debug+Asserts/MipsGenFastISel.inc.tmp]
Error 1
Then it creates a blank file for MipsGenFastISel.inc and after that I
get no build errors.
I'm not sure what this is about .
Any ideas?
Tia.
Reed
So that you don't have to explicitly write code to handle every case in fast isel. You should take a look at the ARM or ARM64 fast isel ports to get an idea of what you should do here. -eric On Wed, Apr 23, 2014 at 5:21 PM, reed kotler <rkotler at mips.com> wrote:> What is the purpose of tablegen created files for fast-isel? > > If I make the following change to Makefile in lib/Target/Mips > > BUILT_SOURCES = MipsGenRegisterInfo.inc MipsGenInstrInfo.inc \ > MipsGenAsmWriter.inc MipsGenCodeEmitter.inc \ > MipsGenDAGISel.inc MipsGenCallingConv.inc \ > - MipsGenSubtargetInfo.inc MipsGenMCCodeEmitter.inc \ > + MipsGenSubtargetInfo.inc MipsGenFastISel.inc > MipsGenMCCodeEmitter.inc \ > MipsGenDisassemblerTables.inc \ > MipsGenMCPseudoLowering.inc MipsGenAsmMatcher.inc > > > I get an error. > > Included from > /home/rkotler/workspace/llvm/lib/Target/Mips/MipsInstrInfo.td:1474: > /home/rkotler/workspace/llvm/lib/Target/Mips/Mips64InstrInfo.td:89:1: error: > Duplicate record in FastISel table! > def DSUB : ArithLogicR<"dsub", GPR64Opnd, 0, II_DSUB, sub>, ADD_FM<0, > 0x2e>; > ^ > make[3]: *** > [/home/rkotler/llvmw/build/lib/Target/Mips/Debug+Asserts/MipsGenFastISel.inc.tmp] > Error 1 > > > Then it creates a blank file for MipsGenFastISel.inc and after that I get no > build errors. > > I'm not sure what this is about . > > Any ideas? > > Tia. > > Reed > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
The error stems from DSUB and DSUBu having the same pattern and predicates (to
find this out, I printed
SimplePatterns[Operands][OpcodeName][VT][RetVT][PredicateCheck].Name just before
the error). If you remove the last argument ('sub') from the DSUB
definition then it will generate the file successfully.
It's probably a bug that DSUB has 'sub' instead of the default
'null_frag'. The 'dsub' instruction it defines will trap on
overflow which doesn't agree with the codegen pattern. Most likely, this bug
has been concealed by the DSUBu instruction (the non-trapping version) being
defined first which has prevented SelectionDAG from even trying to match DSUB.
> -----Original Message-----
> From: reed kotler [mailto:rkotler at mips.com]
> Sent: 24 April 2014 01:21
> To: LLVMdev at cs.uiuc.edu
> Cc: Rafael Espíndola; Daniel Sanders
> Subject: tablegen for fast isel
>
> What is the purpose of tablegen created files for fast-isel?
>
> If I make the following change to Makefile in lib/Target/Mips
>
> BUILT_SOURCES = MipsGenRegisterInfo.inc MipsGenInstrInfo.inc \
> MipsGenAsmWriter.inc MipsGenCodeEmitter.inc \
> MipsGenDAGISel.inc MipsGenCallingConv.inc \
> - MipsGenSubtargetInfo.inc MipsGenMCCodeEmitter.inc \
> + MipsGenSubtargetInfo.inc MipsGenFastISel.inc
> MipsGenMCCodeEmitter.inc \
> MipsGenDisassemblerTables.inc \
> MipsGenMCPseudoLowering.inc MipsGenAsmMatcher.inc
>
>
> I get an error.
>
> Included from
> /home/rkotler/workspace/llvm/lib/Target/Mips/MipsInstrInfo.td:1474:
> /home/rkotler/workspace/llvm/lib/Target/Mips/Mips64InstrInfo.td:89:1:
> error: Duplicate record in FastISel table!
> def DSUB : ArithLogicR<"dsub", GPR64Opnd, 0, II_DSUB,
sub>, ADD_FM<0,
> 0x2e>;
> ^
> make[3]: ***
> [/home/rkotler/llvmw/build/lib/Target/Mips/Debug+Asserts/MipsGenFastIS
> el.inc.tmp]
> Error 1
>
>
> Then it creates a blank file for MipsGenFastISel.inc and after that I get
no
> build errors.
>
> I'm not sure what this is about .
>
> Any ideas?
>
> Tia.
>
> Reed
On 04/24/2014 02:25 AM, Daniel Sanders wrote:> The error stems from DSUB and DSUBu having the same pattern and predicates (to find this out, I printed SimplePatterns[Operands][OpcodeName][VT][RetVT][PredicateCheck].Name just before the error). If you remove the last argument ('sub') from the DSUB definition then it will generate the file successfully. > > It's probably a bug that DSUB has 'sub' instead of the default 'null_frag'. The 'dsub' instruction it defines will trap on overflow which doesn't agree with the codegen pattern. Most likely, this bug has been concealed by the DSUBu instruction (the non-trapping version) being defined first which has prevented SelectionDAG from even trying to match DSUB. >Yeh, you're right. I will make a patch for this and run the mips64 tests.>> -----Original Message----- >> From: reed kotler [mailto:rkotler at mips.com] >> Sent: 24 April 2014 01:21 >> To: LLVMdev at cs.uiuc.edu >> Cc: Rafael Espíndola; Daniel Sanders >> Subject: tablegen for fast isel >> >> What is the purpose of tablegen created files for fast-isel? >> >> If I make the following change to Makefile in lib/Target/Mips >> >> BUILT_SOURCES = MipsGenRegisterInfo.inc MipsGenInstrInfo.inc \ >> MipsGenAsmWriter.inc MipsGenCodeEmitter.inc \ >> MipsGenDAGISel.inc MipsGenCallingConv.inc \ >> - MipsGenSubtargetInfo.inc MipsGenMCCodeEmitter.inc \ >> + MipsGenSubtargetInfo.inc MipsGenFastISel.inc >> MipsGenMCCodeEmitter.inc \ >> MipsGenDisassemblerTables.inc \ >> MipsGenMCPseudoLowering.inc MipsGenAsmMatcher.inc >> >> >> I get an error. >> >> Included from >> /home/rkotler/workspace/llvm/lib/Target/Mips/MipsInstrInfo.td:1474: >> /home/rkotler/workspace/llvm/lib/Target/Mips/Mips64InstrInfo.td:89:1: >> error: Duplicate record in FastISel table! >> def DSUB : ArithLogicR<"dsub", GPR64Opnd, 0, II_DSUB, sub>, ADD_FM<0, >> 0x2e>; >> ^ >> make[3]: *** >> [/home/rkotler/llvmw/build/lib/Target/Mips/Debug+Asserts/MipsGenFastIS >> el.inc.tmp] >> Error 1 >> >> >> Then it creates a blank file for MipsGenFastISel.inc and after that I get no >> build errors. >> >> I'm not sure what this is about . >> >> Any ideas? >> >> Tia. >> >> Reed