Hi, Everyone:
Can anyone let me know the default NEON registers llvm going to use with
armv7 devices?
For example, d10 and d11 are treated as default zero? I am using Xcode5 + llvm
and I got a case that compiler will generate neon codes
" vst.8 {d10, d11}, [r1] "
from C codes:
"int aMV[4];
......
aMV[0] = aMV[1] = aMV[2] = aMV[3] = 0; "
and I didn't find any zero setting instructions related to d10 and d11
beside.
I also want to know other neon registers llvm will use in this way, I can
protect them after calling to my handwrite assembly codes.
Thanks & Best Regards,
Shaolin
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Hello> Can anyone let me know the default NEON registers llvm going to use with > armv7 devices?All available> For example, d10 and d11 are treated as default zero?No. Why?> I also want to know other neon registers llvm will use in this way, I can > protect them after calling to my handwrite assembly codes.The list of call-saved / call-clobbered registers are specified by platform ABI. For iOS you may want to read https://developer.apple.com/library/ios/documentation/Xcode/Conceptual/iPhoneOSABIReference/Articles/ARMv7FunctionCallingConventions.html For EABI/AAPCS - http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042e/IHI0042E_aapcs.pdf But still, this does not apply to hand-written ASM code. You need to instruct compiler about all the registers you may use / define / clobber. -- With best regards, Anton Korobeynikov Faculty of Mathematics and Mechanics, Saint Petersburg State University
Hi Shaolin, On 10 March 2014 13:43, shaolin <shaolin.wu at qq.com> wrote:> For example, d10 and d11 are treated as default zero? I am using Xcode5 + > llvm and I got a case that compiler will generate neon codes > " vst.8 {d10, d11}, [r1] " > from C codes: > "int aMV[4]; > ...... > aMV[0] = aMV[1] = aMV[2] = aMV[3] = 0; "When I compile similar code, I see: vmov.i32 q8, #0x0 [...] vst1.32 { d16, d17 }, [r0] Are you aware that the q0 == d1:d0 == s3:s2:s1:s0, q1 == d2:d1 =s7:s6:s5:s4, ...? So in my case, that vmov to q8 actually sets d16 and d17. If you're not seeing similar, could you post a reasonably small self-contained example that shows your problem? Cheers. Tim.
Hi, Tim:
Thanks for the suggestion, I found the instruction to set q5 to zero.
Thanks & Best Regards,
Shaolin
------------------ Original ------------------
From: "Tim Northover";<t.p.northover at gmail.com>;
Date: Tue, Mar 11, 2014 01:55 AM
To: "shaolin"<shaolin.wu at qq.com>;
Cc: "llvmdev"<llvmdev at cs.uiuc.edu>;
Subject: Re: [LLVMdev] neon registers llvm using
Hi Shaolin,
On 10 March 2014 13:43, shaolin <shaolin.wu at qq.com>
wrote:> For example, d10 and d11 are treated as default zero? I am using Xcode5 +
> llvm and I got a case that compiler will generate neon codes
> " vst.8 {d10, d11}, [r1] "
> from C codes:
> "int aMV[4];
> ......
> aMV[0] = aMV[1] = aMV[2] = aMV[3] = 0; "
When I compile similar code, I see:
vmov.i32 q8, #0x0
[...]
vst1.32 { d16, d17 }, [r0]
Are you aware that the q0 == d1:d0 == s3:s2:s1:s0, q1 == d2:d1 =s7:s6:s5:s4,
...? So in my case, that vmov to q8 actually sets d16 and
d17.
If you're not seeing similar, could you post a reasonably small
self-contained example that shows your problem?
Cheers.
Tim.
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Dear Anton:
Thanks for the information, I need to add push/pop to my assembly codes.
By the way, are there any optimization guidance document about how to write
C/C++/ObjectC codes to help llvm compiler generate NEON codes?
Thanks again & Best Regards,
Shaolin
------------------ Original ------------------
From: "Anton Korobeynikov";<anton at korobeynikov.info>;
Date: Tue, Mar 11, 2014 01:51 AM
To: "shaolin"<shaolin.wu at qq.com>;
Cc: "llvmdev"<llvmdev at cs.uiuc.edu>;
Subject: Re: [LLVMdev] neon registers llvm using
Hello
> Can anyone let me know the default NEON registers llvm going to use
with
> armv7 devices?
All available
> For example, d10 and d11 are treated as default zero?
No. Why?
> I also want to know other neon registers llvm will use in this way, I can
> protect them after calling to my handwrite assembly codes.
The list of call-saved / call-clobbered registers are specified by platform ABI.
For iOS you may want to read
https://developer.apple.com/library/ios/documentation/Xcode/Conceptual/iPhoneOSABIReference/Articles/ARMv7FunctionCallingConventions.html
For EABI/AAPCS -
http://infocenter.arm.com/help/topic/com.arm.doc.ihi0042e/IHI0042E_aapcs.pdf
But still, this does not apply to hand-written ASM code. You need to
instruct compiler about all the registers you may use / define /
clobber.
--
With best regards, Anton Korobeynikov
Faculty of Mathematics and Mechanics, Saint Petersburg State University
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