Hi all! On x86_64, segment prefix fs: is in address space 257 and gs: in address space 256. (BTW: are there constants for these magic values?) How can I use this in IR? I want to express this assembler code in IR: mov RAX, 8; mov RAX, GS:[RAX]; ret; I tried the following: define i64 @getStackBottom(i64 %addr) { entry: %ptr = inttoptr i64 %addr to i64* %fs_ptr = addrspacecast i64* %ptr to i64 addrspace(256)* %bottom = load i64 addrspace(256)* %fs_ptr, align 1 ret i64 %bottom } but this results in LLVM ERROR: Cannot select: 0xcc6c60: i64 = addrspacecast 0xcc6b60[0 -> 256] [ORD=3] [ID=6] 0xcc6b60: i64,ch = CopyFromReg 0xc95e38, 0xcc6a60 [ORD=1] [ID=5] 0xcc6a60: i64 = Register %vreg0 [ID=1] In function: getStackBottom Stack dump: 0. Program arguments: llc thr_ll.ll 1. Running pass 'Function Pass Manager' on module 'thr_ll.ll'. 2. Running pass 'X86 DAG->DAG Instruction Selection' on function '@getStackBottom' Do I miss something here? Or is this simply not yet implemented? Regards, Kai
I believe the following does what you would like: define i64 @getStackBottom(i64 %addr) { %0 = inttoptr i64 %addr to i64 addrspace(256)* %1 = load i64 addrspace(256)* %0, align 1 ret i64 %1 } My build of llvm generates the following code with -O3: getStackBottom: movq %gs:(%rdi), %rax retq On Mon, Jan 27, 2014 at 12:04 PM, Kai Nacke <kai.nacke at redstar.de> wrote:> Hi all! > > On x86_64, segment prefix fs: is in address space 257 and gs: in address > space 256. (BTW: are there constants for these magic values?) How can I use > this in IR? I want to express this assembler code in IR: > > mov RAX, 8; > mov RAX, GS:[RAX]; > ret; > > I tried the following: > > define i64 @getStackBottom(i64 %addr) { > entry: > %ptr = inttoptr i64 %addr to i64* > %fs_ptr = addrspacecast i64* %ptr to i64 addrspace(256)* > %bottom = load i64 addrspace(256)* %fs_ptr, align 1 > ret i64 %bottom > } > > but this results in > > LLVM ERROR: Cannot select: 0xcc6c60: i64 = addrspacecast 0xcc6b60[0 -> > 256] [ORD=3] [ID=6] > 0xcc6b60: i64,ch = CopyFromReg 0xc95e38, 0xcc6a60 [ORD=1] [ID=5] > 0xcc6a60: i64 = Register %vreg0 [ID=1] > In function: getStackBottom > Stack dump: > 0. Program arguments: llc thr_ll.ll > 1. Running pass 'Function Pass Manager' on module 'thr_ll.ll'. > 2. Running pass 'X86 DAG->DAG Instruction Selection' on function > '@getStackBottom' > > Do I miss something here? Or is this simply not yet implemented? > > Regards, > Kai > > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev >-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20140127/4e04cb1d/attachment.html>
Thanks! This works for me, too. Regards, Kai On 27.01.2014 21:42, David Majnemer wrote:> I believe the following does what you would like: > > define i64 @getStackBottom(i64 %addr) { > %0 = inttoptr i64 %addr to i64 addrspace(256)* > %1 = load i64 addrspace(256)* %0, align 1 > ret i64 %1 > } > > My build of llvm generates the following code with -O3: > getStackBottom: > movq %gs:(%rdi), %rax > retq > > > > > On Mon, Jan 27, 2014 at 12:04 PM, Kai Nacke <kai.nacke at redstar.de > <mailto:kai.nacke at redstar.de>> wrote: > > Hi all! > > On x86_64, segment prefix fs: is in address space 257 and gs: in > address space 256. (BTW: are there constants for these magic > values?) How can I use this in IR? I want to express this assembler > code in IR: > > mov RAX, 8; > mov RAX, GS:[RAX]; > ret; > > I tried the following: > > define i64 @getStackBottom(i64 %addr) { > entry: > %ptr = inttoptr i64 %addr to i64* > %fs_ptr = addrspacecast i64* %ptr to i64 addrspace(256)* > %bottom = load i64 addrspace(256)* %fs_ptr, align 1 > ret i64 %bottom > } > > but this results in > > LLVM ERROR: Cannot select: 0xcc6c60: i64 = addrspacecast 0xcc6b60[0 > -> 256] [ORD=3] [ID=6] > 0xcc6b60: i64,ch = CopyFromReg 0xc95e38, 0xcc6a60 [ORD=1] [ID=5] > 0xcc6a60: i64 = Register %vreg0 [ID=1] > In function: getStackBottom > Stack dump: > 0. Program arguments: llc thr_ll.ll > 1. Running pass 'Function Pass Manager' on module 'thr_ll.ll'. > 2. Running pass 'X86 DAG->DAG Instruction Selection' on > function '@getStackBottom' > > Do I miss something here? Or is this simply not yet implemented? > > Regards, > Kai > > _________________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu <mailto:LLVMdev at cs.uiuc.edu> http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/__mailman/listinfo/llvmdev > <http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev> > >