On Thu, Nov 28, 2013 at 1:03 AM, Kay Tiong Khoo <kkhoo at perfwizard.com>wrote:> Hi Jun, > > I'm not sure how to fix this yet, but this looks incorrectly defined in > lib/Target/X86/X86InstrInfo.td: > > def MOV32o32a : Ii32 <0xA1, RawFrm, (outs), (ins offset32:$src), > "mov{l}\t{$src, %eax|eax, $src}", [], IIC_MOV_MEM>, > Requires<[In32BitMode]>; > > This instruction can be REX-prefixed for a 64-bit move, and that also > doesn't appear to be defined anywhere. > > I would file a bugzilla in the x86 component and cc Craig Topper, the x86 > disasm/codegen expert. > > > > On Wed, Nov 27, 2013 at 8:56 AM, Jun Koi <junkoi2004 at gmail.com> wrote: > >> Hi, >> >> With objdump, i have this (Intel syntax) >> >> 64 a1 00 00 00 00 mov eax,fs:0x0 >> >> >> However, if I pass above string to llvm-mc, I would have: >> >> $ echo "0x64 0xa1 0x00 0x00 0x00 0x00"|./Release+Asserts/bin/llvm-mc >> -disassemble -arch=x86 --output-asm-variant=1 >> .text >> mov eax, dword ptr [0] >> >> >> You can see a big difference. This is on the latest code. Any idea how to >> fix this bug? >> >>Any plan to fix this bug? Thanks. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20140114/ae16b30e/attachment.html>
I started trying to fix this tonight but it's pretty nasty to fix. I'll try to make another go at it later this week. On Tue, Jan 14, 2014 at 5:47 AM, Jun Koi <junkoi2004 at gmail.com> wrote:> > > > On Thu, Nov 28, 2013 at 1:03 AM, Kay Tiong Khoo <kkhoo at perfwizard.com>wrote: > >> Hi Jun, >> >> I'm not sure how to fix this yet, but this looks incorrectly defined in >> lib/Target/X86/X86InstrInfo.td: >> >> def MOV32o32a : Ii32 <0xA1, RawFrm, (outs), (ins offset32:$src), >> "mov{l}\t{$src, %eax|eax, $src}", [], IIC_MOV_MEM>, >> Requires<[In32BitMode]>; >> >> This instruction can be REX-prefixed for a 64-bit move, and that also >> doesn't appear to be defined anywhere. >> >> I would file a bugzilla in the x86 component and cc Craig Topper, the x86 >> disasm/codegen expert. >> >> >> >> On Wed, Nov 27, 2013 at 8:56 AM, Jun Koi <junkoi2004 at gmail.com> wrote: >> >>> Hi, >>> >>> With objdump, i have this (Intel syntax) >>> >>> 64 a1 00 00 00 00 mov eax,fs:0x0 >>> >>> >>> However, if I pass above string to llvm-mc, I would have: >>> >>> $ echo "0x64 0xa1 0x00 0x00 0x00 0x00"|./Release+Asserts/bin/llvm-mc >>> -disassemble -arch=x86 --output-asm-variant=1 >>> .text >>> mov eax, dword ptr [0] >>> >>> >>> You can see a big difference. This is on the latest code. Any idea how >>> to fix this bug? >>> >>> > Any plan to fix this bug? > > Thanks. > > > >-- ~Craig -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20140114/0c4d3cb1/attachment.html>
On Tue, 2014-01-14 at 22:59 -0800, Craig Topper wrote:> I started trying to fix this tonight but it's pretty nasty to fix. > I'll try to make another go at it later this week.Much of it seems fixed already; what's left to fix? The segment prefix override? Does that mean we get to fix disassembly of '0x65 0xa4' while we're at it? (Although we can't even *assemble* that one, I note.) Any comments on the patches I posted on Monday to fix various 16-bit disasm issues? -- dwmw2 -------------- next part -------------- A non-text attachment was scrubbed... Name: smime.p7s Type: application/x-pkcs7-signature Size: 5745 bytes Desc: not available URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20140115/595a5c6f/attachment.bin>