Vesa Norilo
2013-Jul-05 12:59 UTC
[LLVMdev] Enabling vectorization with LLVM 3.3 for a DSL emitting LLVM IR
Hi, For libfaust, perhaps? :) Could it be something as simple as a target triple defined for the module? Without knowledge of the target machine vector width, the vectorizer will assume maximum width of 1. You can override this without a triple by using the -force-vector-width switch. Vesa> Hi, > > Our DSL can generate C or directly generate LLVM IR. With LLVM 3.3, we > can vectorize the C produced code using clang with -O3, or clang with > -O1 then opt -O3 -vectorize-loops. But the same program generating LLVM > IR version cannot be vectorized with opt -O3 -vectorize-loops. So our > guess is that our generated LLVM IR lacks some informations that are > needed by the vectorization passes to correctly work. > > Any idea of what could be lacking? > > Thanks > > St?phane Letz
Apparently Analagous Threads
- [LLVMdev] Enabling vectorization with LLVM 3.3 for a DSL emitting LLVM IR
- [LLVMdev] Enabling vectorization with LLVM 3.3 for a DSL emitting LLVM IR
- [LLVMdev] Enabling vectorization with LLVM 3.3 for a DSL emitting LLVM IR
- [LLVMdev] Enabling vectorization with LLVM 3.3 for a DSL emitting LLVM IR
- [LLVMdev] Enabling vectorization with LLVM 3.3 for a DSL emitting LLVM IR