llvm dev - Oct 2011 - [LLVMdev] Vector-select status update

Hi, 

As of recently, the LLVM code-generator started supporting vector-select
instructions (select instructions where the predicate operand is a vector of
booleans).

This support includes efficient sequences for targets which have dedicated blend
instructions (such as SSE4 and AVX), a slower implementation using
vector AND/OR/XOR instructions for unoptimized targets, and scalarization for
targets which do not support vectors.

For example: 
https://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx-blend.ll?revision=139992

However, enabling vector-select code generation requires running LLVM with a
special flag (-promote-elements), which affects the way
the LLVM Type-Legalizer legalizes vectors.

This flag is not turned on by default because there are still a few open issues
with non-x86 targets (mainly ARM).

If you are interested in having vector-select support then there are a few
things that you can do to help:
1. Have a look at pr10902 and try to resolve the last few open issues. 
2. Compile your application using the -promote-elements flag and report any
performance regressions (and performance gains!).


- Nadav




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On Sat, Oct 01, 2011 at 02:56:04PM +0300, Rotem, Nadav
wrote:
> Hi, 
> 
> As of recently, the LLVM code-generator started supporting vector-select
instructions (select instructions where the predicate operand is a vector of
booleans).
> 
> This support includes efficient sequences for targets which have dedicated
blend instructions (such as SSE4 and AVX), a slower implementation using
> vector AND/OR/XOR instructions for unoptimized targets, and scalarization
for targets which do not support vectors.
> 
> For example: 
https://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/avx-blend.ll?revision=139992
> 
> However, enabling vector-select code generation requires running LLVM with
a special flag (-promote-elements), which affects the way
> the LLVM Type-Legalizer legalizes vectors.
> 
> This flag is not turned on by default because there are still a few open
issues with non-x86 targets (mainly ARM).
> 
> If you are interested in having vector-select support then there are a few
things that you can do to help:
> 1. Have a look at pr10902 and try to resolve the last few open issues. 
> 2. Compile your application using the -promote-elements flag and report any
performance regressions (and performance gains!).
> 
> 
> - Nadav
Nadav,
   Alternatively, dragonegg can be used with
-fplugin-arg-dragonegg-enable-gcc-optzns and either -O2 -ftree-vectorize or
-O3 (which defaults on -ftree-vectorize) to autovectorize using the FSF gcc 4.5
or 4.6 front-end. At r141601, the
Polyhedron 2005 benchmarks now compile without regressions using the
optimization flags...

 -msse4 -ffast-math -funroll-loops -O3 -fplugin-arg-dragonegg-enable-gcc-optzns

Hopefully after the llvm 3.0 branch occurs, we can default on
-fplugin-arg-dragonegg-enable-gcc-optzns in
dragonegg svn in order to get vector-select tested on as wide a swath of code as
possible.
           Jack

> 
> 
> 
> 
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> 
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> 
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