thr3ads.net - freebsd stable - BPi-M3 under stable/11 details: boots but with only 4 cores used for SMP --of 8 cores present. . . [Oct 2016]

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Mark Millard

2016-Oct-24 16:04 UTC

BPi-M3 under stable/11 details: boots but with only 4 cores used for SMP --of 8 cores present. . .

The is for a Banana Pi M3 V1.2 board with the barrel power connector. The 5V 2A
supply that I had to fit the barrel hole can not power the board sufficiently to
boot --even when no fan is being powered. In order to boot with a fan I have
both that and an official rpi3 power supply plugged in. The rpi3 power supply
will not power the GPIO fan connections but can boot the board by itself (V5.1v
and 2.5A but cell phone charger cabling/connections). I've got a heat sink
on the CPU as well.
> root at bananapi-m3:~ # uname -apKU
> FreeBSD bananapi-m3 11.0-STABLE FreeBSD 11.0-STABLE #0 r307797M: Mon Oct 24
00:41:16 PDT 2016     markmi at
FreeBSDx64:/usr/local/src/crochet/work/obj/arm.armv6/usr/src/sys/ALLWINNER  arm
armv6 1100505 1
> 100505
> root at bananapi-m3:~ # freebsd-version -ku
> 11.0-STABLE
> 11.0-STABLE
In the below note that "FreeBSD/SMP: Multiprocessor System Detected: 4
CPUs" but cpulist0 shows cpu0 through cpu7. For now: So much for seeing how
buildworld/buildkernel would go using all 8 cores.

(Note: the serial connection tends to drop some text sometimes. That may have
happened some for the below.)
> root at bananapi-m3:~ # dmesg | more
> Copyright (c) 1992-2016 The FreeBSD Project.
> Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993, 1994
>        The Regents of the University of California. All rights reserved.
> FreeBSD is a registered trademark of The FreeBSD Foundation.
> FreeBSD 11.0-STABLE #0 r307797M: Mon Oct 24 00:41:16 PDT 2016
>    markmi at
FreeBSDx64:/usr/local/src/crochet/work/obj/arm.armv6/usr/src/sys/ALLWINNER arm
> FreeBSD clang version 3.8.0 (tags/RELEASE_380/final 262564) (based on LLVM
3.8.0)
> VT: init without driver.
> CPU: Cortex A7 rev 5 (Cortex-A core)
> Supported features: ARM_ISA THUMB2 JAZELLE THUMBEE ARMv4 Security_Ext
> WB enabled LABT branch prediction disabled
> LoUU:2 LoC:3 LoUIS:2 
> Cache level 1: 
> 32KB/64B 4-way data cache WB Read-Alloc Write-Alloc
> 32KB/32B 2-way instruction cache Read-Alloc
> Cache level 2: 
> 512KB/64B 8-way unified cache WB Read-Alloc Write-Alloc
> real memory  = 2147483648 (2048 MB)
> avail memory = 2090852352 (1993 MB)
> FreeBSD/SMP: Multiprocessor System Detected: 4 CPUs
> random: entropy device external interface
> kbd0 at kbdmux0
> ofwbus0: <Open Firmware Device Tree>
> aw_ccu0: <Allwinner Clock Control Unit> on ofwbus0
> clk_fixed0: <Fixed clock> on aw_ccu0
> clk_fixed1: <F PLL Clock> mem 0x1c20028-0x1c2002b on aw_ccu0
> clk_fixed3: <Fixed factor clock> on aw_ccu0
> aw_ahbclk0: <Allwinner AHB Clock> mem 0x1c20054-0x1c20057 on aw_ccu0
> aw_apbclk0: <Allwinner APB Clock> mem 0x1c20054-0x1c20057 on aw_ccu0
> aw_apbclk1: <Allwinner APB Clock> mem 0x1c20058-0x1c2005b on aw_ccu0
> aw_ahbclk1: <Allwinner AHB Clock> mem 0x1c2005c-0x1c2005f on aw_ccu0
> aw_gate0: <Allwinner Bus Clock Gates> mem 0x1c20060-0x1c2006f on
aw_ccu0
> aw_mmcclk0: <Allwinner MMC Clock> mem 0x1c20088-0x1c2clk1:
<Allwinner MMC Clock> mem 0x1c2008c-0x1c2008f on aw_ccu0
> aw_mmcclk2: <Allwinner MMC Clock> mem 0x1c20090-0x1c20093 on aw_ccu0
> aw_cpusclk0: <Allwinner CPUS Clock> mem 0x1f01400-0x1f01403 on
aw_ccu0
> clk_fixed4: <Fixed factor clock> on aw_ccu0
> aw_apbclk2: <Allwinner APB Clock> mem 0x1f0140c-0x1f0140f on aw_ccu0
> aw_gate1: <Allwinner APB0 Clock Gates> mem 0x1f01428-0x1f0142b on
aw_ccu0
> aw_pll1: <Allwinner PLL Clock> mem 0x1c20044-0x1c20047 on aw_ccu0
> aw_usbclk0: <Allwinner USB Clocks> mem 0x1c200cc-0x1c200cf on aw_ccu0
> clk_fixed5: <Fixed clr GMAC Clock> mem 0x1c00030-0x1c00033 on aw_ccu0
> simplebus0: <Flattened device tree simple bus> on ofwbus0
> aw_reset0: <Allwinner Module Resets> mem 0x1c202c0-0x1c202cb on
simplebus0
> aw_reset1: <Allwinner Module Resets> mem 0x1c202d0-0x1c202d3 on
simplebus0
> aw_reset2: <Allwinner Module Resets> mem 0x1c202d8-0x1c202db on
simplebus0
> aw_reset3: <Allwinner Module Resets> mem 0x1f014b0-0x1f014b3 on
simplebus0
> iichb0: <Allwinner Integrated I2C Bus Controller> mem
0x1c2ac00-0x1c2afff on simplebus0
> iicbus0: hb0
> iichb1: <Allwinner Integrated I2C Bus Controller> mem
0x1c2b000-0x1c2b3ff on simplebus0
> iicbus1: <OFW I2C bus> on iichb1
> iichb2: <Allwinner Integrated I2C Bus Controller> mem
0x1c2b400-0x1c2b7ff on simplebus0
> iicbus2: <OFW I2C bus> on iichb2
> regfix0: <Fixed Regulator> on ofwbus0
> regfix1: <Fixed Regulator> on ofwbus0
> regfix2: <Fixed Regulator> on ofwbus0
> regfix3: <Fixed Regulator> on ofwbus0
> regfix4: <Fixed Regulator> on ofwbus0
> aw_sid0: <Allwinner Secure ID Controller> mem 0x1c14000-0x1c143ff on
simplebus0
> awusbphy0: <Allwinner USB PHY> on simplebu,0x1c86000-0x1c87fff on
simplebus0
> gic0: pn 0x20, arch 0x2, rev 0x1, implementer 0x43b irqs 224
> gpio0: <Allwinner GPIO/Pinmux controller> mem 0x1c20800-0x1c20bff on
simplebus0
> gpiobus0: <OFW GPIO bus> on gpio0
> gpio1: <Allwinner GPIO/Pinmux controller> mem 0x1f02c00-0x1f02fff on
simplebus0
> gpiobus1: <OFW GPIO bus> on gpio1
> aw_nmi0: <Allwinner NMI Controller> mem 0x1f00c0c-0x1f00c43 on
simplebus0
> generic_timer0: <ARMv7 Generic Timer> on ofwbus0
> Timecounter "cy 24000000 Hz quality 1000
> Event timer "ARM MPCore Eventtimer" frequency 24000000 Hz quality
1000
> cpulist0: <Open Firmware CPU Group> on ofwbus0
> cpu0: <Open Firmware CPU> on cpulist0
> cpu1: <Open Firmware CPU> on cpulist0
> cpu2: <Open Firmware CPU> on cpulist0
> cpu3: <Open Firmware CPU> on cpulist0
> cpu4: <Open Firmware CPU> on cpulist0
> cpu5: <Open Firmware CPU> on cpulist0
> cpu6: <Open Firmware CPU> on cpulist0
> cpu7: <Open Firmware CPU> on cpulist0
> a10_mmc0: <Allwinner Integrated MMC/SD controller> mem
0x1c0f000-0x1c0ffff on simplebus0
> mmc0: <MMC/SD bus> on a10_mmc0
> a10_mmc1: <Allwinner Integrated MMC/SD controller> mem
0x1c11000-0x1c11fff on simplebus0
> mmc1: <MMC/SD bus> on a10_mmc1
> gpioc0: <GPIO controller> on gpio0
> aw_wdog0: <Allwinner A31 Watchdog> mem 0x1c20ca0-0x1c20cbf on
simplebus0
> uart0: <Non-standard ns8250 class UART with FIFOs> mem
0x1c28000-0x1c283ff on simplebus0
> uart0: console (480769,n,8,1)
> gpioc1: <GPIO controller> on gpio1
> iichb3: <Allwinner RSB> mem 0x1f03400-0x1f037ff on simplebus0
> iicbus3: <OFW I2C bus> on iichb3
> iic0: <I2C generic I/O> on iicbus3
> axp81x_pmu0: <X-Powers AXP81x Power Management Unit> at addr 0x746 on
iicbus3
> gpiobus2: <OFW GPIO bus> on axp81x_pmu0
> gpioled0: <GPIO led> at pin 0 on gpiobus2
> gpioled1: <GPIO led> at pin 1 on gpiobus2
> gpioc2: <GPIO controller> on axp81x_pmu0
> iic1: <I2C generic I/O> on iicbus0
> iic2: <I2C generic I/O> on iicbus1
> iic3: <I2C generic I/O> on iicbus2
> ehci0: <Allwinner Integrated USB 2.0 controller> mem
0x1c1a000-0x1c1a0ff on simplebus0
> usbus0: EHCI version 1.0
> usbus0 on ehci0
> ehci1: <Allwinner Integrated USB 2.0 controller> mem
0x1c1b000-0x1c1b0ff on simplebus0
> usbus1: EHCI version 1.0
> usbus1 on ehci1
> awg0: <Allwinner Gigabit Ethernet> mem 0x1c30000-0x1c300ff on
simplebus0
> miibus0: <MII bus> on awg0
> rgephy0: <RTL8169S/8110S/8211 1000BASE-T media interface> PHY 0 on
miibus0
> rgephy0:  none, 10baseT, 10baseT-FDX, 10baseT-FDX-flow, 100baseTX,
100baseTX-FDX, 100baseTX-FDX-flow, 1000baseT, 1000baseT-master, 1000baseT-FDX,
1000baseT-FDX-master, 1000baseT-FDX-flow, 1000baseT-FD
> X-flow-master, auto, auto-flow
> rgephy1: <RTL8169S/8110S/8211 1000BASE-T media interface> PHY 1 on
miibus0
> rgephy1:  none, 10baseT, 10baseT-FDX, 10baseT-FDX-flow, 100baseTX,
100baseTX-FDX, 100baseTX-FDX-flow, 1000baseT, 1000baseT-master, 1000baseT-FDX,
1000baseT-FDX-master, 1000baseT-FDX-flow, 1000baseT-FD
> X-flow-master, auto, auto-flow
> awg0: Ethernet address: f2:00:52:68:6d:d8
> aw_thermal0: <Allwinner Thermal Sensor Controller> mem
0x1f04000-0x1f043ff on simplebus0
> cryptosoft0: <software crypto>
> Timecounters tick every 10.000 msec
> usbus0: 480Mbps High Speed USB v2.0
> usbus1: 480Mbps High Speed USB v2.0
> ugen1.1: <Allwinner> at usbus1
> ugen0.1: <Allwinner> at usbus0
> uhub0: <Allwinner EHCI root HUB, class 9/0, rev 2.00/1.00, addr 1> on
usbus0
> uhub1: <Allwinner EHCI root HUB, class 9/0, rev 2.00/1.00, addr 1> on
usbus1
> mmcsd0: 32GB <SDHC 00000 1.0 SN A1535564 MFG 09/2015 by 27 SM> at
mmc0 50.0MHz/4bit/65535-block
> a10_mmc1: error rint: 0x00000100
> a10_mmc1: error rint: 0x00000100
> a10_mmc1: error rint: 0x00000100
> a10_mmc1: error rint: 0x00000100
> a10_mmc1: error rint: 0x00000100
> a10_mmc1: error rint: 0x00000100
> a10_mmc1: error rint: 0x00000100
> a10_mmc1: error rint: 0x00000100
> a10_mmc1: error rint: 0x00008018
> a10_mmc1: error rint: 0x00000100
> a10_mmc1: error rint: 0x00000100
> a10_mmc1: error rint: 0x00000100
> a10_mmc1: error rint: 0x00000100
> mmcsd1: 8GB <MMCHC 8WPD3R 0.0 SN E7C6641B MFG 01/2000 by 21 0x0000>
at mmc1 50.0MHz/8bit/65535-block
> Release APs
> Trying to mount root from ufs:/dev/mmcsd0s2a [rw,noatime]...
> warning: no time-of-day clock registered, system time will not be set
accurately
> uhub0: 1 port with 1 removable, self powered
> uhub1: 1 port with 1 removable, self powered
> ugen0.2: <vendor 0x1a40> at usbus0
> uhub2 on uhub0
> uhub2: <vendor 0x1a40 USB 2.0 Hub, class 9/0, rev 2.00/1.11, addr 2>
on usbus0
> uhub2: 4 ports with 4 removable, self powered
> ugen0.3: <vendor 0x05e3> at usbus0
> umass0 on uhub2
> umass0: <vendor 0x05e3 USB Storage, class 0/0, rev 2.00/0.16, addr 3>
on usbus0
> (probe0:umass-sim0:0:0:0): INQUIRY. CDB: 12 00 00 00 24 00 
> (probe0:umass-sim0:0:0:0): CAM status: CCB request completed with an error
> (probe0:umass-sim0:0:0:0): Retrying command
> random: unblocking device.
> awg0: link state changed to DOWN
> (probe0:umass-sim0:0:0:0): INQUIRY. CDB: 12 00 00 00 24 00 
> (probe0:umass-sim0:0:0:0): CAM status: CCB request completed with an error
> (probe0:umass-sim0:0:0:0): Retrying command
> awg0: link state changed to UP
> (probe0:umass-sim0:0:0:0): INQUIRY. CDB: 12 00 00 00 24 00 
> (probe0:umass-sim0:0:0:0): CAM status: CCB request completed with an error
> (probe0:umass-sim0:0:0:0): Retrying command
> (probe0:umass-sim0:0:0:0): INQUIRY. CDB: 12 00 00 00 24 00 
> (probe0:umass-sim0:0:0:0): CAM status: CCB request completed with an error
> (probe0:umass-sim0:0:0:0): Retrying command
> (probe0:umass-sim0:0:0:0): INQUIRY. CDB: 12 00 00 00 24 00 
> (probe0:umass-sim0:0:0:0): CAM status: CCB request completed with an error
> (probe0:umass-sim0:0:0:0): Error 5, Retries exhausted
So far the probe0 messages stop after just a few like the above.

Also it looks like the 8GB eMMC (mmc1 / mmcsd1) is likely not supported yet.

I have not yet tried connecting an external usb drive.

Some structure of what was done with the cores shows in the sysctl -a output:
cpu names 0-3 and 100-103.

(Note: the serial connection tends to drop some text sometimes. That may have
happened some for the below.)
> root at bananapi-m3:~ # sysctl -a | grep cpu
> kern.smp.cpus: 4
> kern.smp.maxcpus: 4
> kern.ccpu: 0
>  <cpu count="4" mask="f">0, 1, 2, 3</cpu>
>    <cpu count="4" mask="f">0, 1, 2, 3</cpu>
> kern.sched.cpusetsize: 4
> kern.pin_pcpu_swi: 0
> kern.vt.splash_cpu_duration: 10
> kern.vt.splash_cpu_style: 2
> kern.vt.splash_ncpu: 0
> kern.vt.splash_cpu: 0
> net.inet.tcp.per_cpu_timers: 0
> debug.PMAP1changedcpu: 106
> debug.cpufreq.verbose: 0
> debug.cpufreq.lowest: 0
> hw.ncpu: 4
> dev.cpu.7.%parent: cpulist0
> dev.cpu.7.%pnpinfo: name=cpu at 103 compat=arm,cortex-a7
> dev.cpu.7.%location: 
> dev.cpu.7.%driver: cpu
> dev.cpu.7.%desc: Open Firmware CPU
> dev.cpu.6.%parent: cpulist0
> dev.cpu.6.%pnpinfo: name=cpu at 102 compat=arm,cortex-a7
> dev.cpu.6.%location: 
> dev.cpu.6.%driver: cpu
> dev.cpu.6.%desc: Open Firmware CPU
> dev.cpu.5.%parent: cpulist0
> dev.cpu.5.%pnpinfo: name=cpu at 101 compat=arm,cortex-a7
> dev.cpu.5.%location: 
> dev.cpu.5.%dri.5.%desc: Open Firmware CPU
> dev.cpu.4.%parent: cpulist0
> dev.cpu.4.%pnpinfo: name=cpu at 100 compat=arm,cortex-a7
> dev.cpu.4.%location: 
> dev.cpu.4.%driver: cpu
> dev.cpu.4.%desc: Open Firmware CPU
> dev.cpu.3.%parent: cpulist0
> dev.cpu.3.%pnpinfo: name=cpu at 3 compat=arm,cortex-a7
> dev.cpu.3.%location: 
> dev.cpu.3.%driver: cpu
> dev.cpu.3.%desc: Open Firmware CPU
> dev.cpu.2.%parent: cpulist0
> dev.cpu.2.%pnpinfo: name=cpu at 2 compat=arm,cortex-a7
> dev.cpu.2.%location: 
> dev.cpu.2.%driver: cpu
> dev.cpu.2.%desc: Open Firmware CPU
> dev.cpu.1.%parent: cpulist0
> dev.cpu.1.%location: 
> dev.cpu.1.%driver: cpu
> dev.cpu.1.%desc: Open Firmware CPU
> dev.cpu.0.%parent: cpulist0
> dev.cpu.0.%pnpinfo: name=cpu at 0 compat=arm,cortex-a7
> dev.cpu.0.%location: 
> dev.cpu.0.%driver: cpu
> dev.cpu.0.%desc: Open Firmware CPU
> dev.cpu.0.%parent: cpulist0
> dev.cpulist.0.%parent: ofwbus0
> dev.cpulist.0.%pnpinfo: name=cpus
> dev.cpulist.0.%location: 
> dev.cpulist.0.%driver: cpulist
> dev.cpulist.0.%desc: Open Firmware CPU Group
> dev.cpulist.%parent: 
> dev.aw_cpusclk.0.%parent: aw_ccu0
> dev.aw_cpusclk.0.%pnpinfo: name=clk at 01f0140inner,sun8i-a83t-cpus-clk
> dev.aw_cpusclk.0.%location: 
> dev.aw_cpusclk.0.%driver: aw_cpusclk
> dev.aw_cpusclk.0.%desc: Allwinner CPUS Clock
> dev.aw_cpusclk.%parent: 
> security.jail.param.cpuset.id: 0


==Mark Millard
markmi at dsl-only.net

Emmanuel Vadot

2016-Oct-24 21:00 UTC

head link

BPi-M3 under stable/11 details: boots but with only 4 cores used for SMP --of 8 cores present. . .

Hello Mark,

 The A83T is BIG/Little IIRC and we don't support that. That's why you
only see 4 cores on the 8.
 cpulist0 shows 8 core because every core in is the dtb.

On Mon, 24 Oct 2016 09:04:35 -0700
Mark Millard <markmi at dsl-only.net> wrote:
> The is for a Banana Pi M3 V1.2 board with the barrel power connector. The
5V 2A supply that I had to fit the barrel hole can not power the board
sufficiently to boot --even when no fan is being powered. In order to boot with
a fan I have both that and an official rpi3 power supply plugged in. The rpi3
power supply will not power the GPIO fan connections but can boot the board by
itself (V5.1v and 2.5A but cell phone charger cabling/connections). I've got
a heat sink on the CPU as well.
> 
> > root at bananapi-m3:~ # uname -apKU
> > FreeBSD bananapi-m3 11.0-STABLE FreeBSD 11.0-STABLE #0 r307797M: Mon
Oct 24 00:41:16 PDT 2016     markmi at
FreeBSDx64:/usr/local/src/crochet/work/obj/arm.armv6/usr/src/sys/ALLWINNER  arm
armv6 1100505 1
> > 100505
> 
> > root at bananapi-m3:~ # freebsd-version -ku
> > 11.0-STABLE
> > 11.0-STABLE
> 
> In the below note that "FreeBSD/SMP: Multiprocessor System Detected: 4
CPUs" but cpulist0 shows cpu0 through cpu7. For now: So much for seeing how
buildworld/buildkernel would go using all 8 cores.
> 
> (Note: the serial connection tends to drop some text sometimes. That may
have happened some for the below.)
> 
> > root at bananapi-m3:~ # dmesg | more
> > Copyright (c) 1992-2016 The FreeBSD Project.
> > Copyright (c) 1979, 1980, 1983, 1986, 1988, 1989, 1991, 1992, 1993,
1994
> >        The Regents of the University of California. All rights
reserved.
> > FreeBSD is a registered trademark of The FreeBSD Foundation.
> > FreeBSD 11.0-STABLE #0 r307797M: Mon Oct 24 00:41:16 PDT 2016
> >    markmi at
FreeBSDx64:/usr/local/src/crochet/work/obj/arm.armv6/usr/src/sys/ALLWINNER arm
> > FreeBSD clang version 3.8.0 (tags/RELEASE_380/final 262564) (based on
LLVM 3.8.0)
> > VT: init without driver.
> > CPU: Cortex A7 rev 5 (Cortex-A core)
> > Supported features: ARM_ISA THUMB2 JAZELLE THUMBEE ARMv4 Security_Ext
> > WB enabled LABT branch prediction disabled
> > LoUU:2 LoC:3 LoUIS:2 
> > Cache level 1: 
> > 32KB/64B 4-way data cache WB Read-Alloc Write-Alloc
> > 32KB/32B 2-way instruction cache Read-Alloc
> > Cache level 2: 
> > 512KB/64B 8-way unified cache WB Read-Alloc Write-Alloc
> > real memory  = 2147483648 (2048 MB)
> > avail memory = 2090852352 (1993 MB)
> > FreeBSD/SMP: Multiprocessor System Detected: 4 CPUs
> > random: entropy device external interface
> > kbd0 at kbdmux0
> > ofwbus0: <Open Firmware Device Tree>
> > aw_ccu0: <Allwinner Clock Control Unit> on ofwbus0
> > clk_fixed0: <Fixed clock> on aw_ccu0
> > clk_fixed1: <F PLL Clock> mem 0x1c20028-0x1c2002b on aw_ccu0
> > clk_fixed3: <Fixed factor clock> on aw_ccu0
> > aw_ahbclk0: <Allwinner AHB Clock> mem 0x1c20054-0x1c20057 on
aw_ccu0
> > aw_apbclk0: <Allwinner APB Clock> mem 0x1c20054-0x1c20057 on
aw_ccu0
> > aw_apbclk1: <Allwinner APB Clock> mem 0x1c20058-0x1c2005b on
aw_ccu0
> > aw_ahbclk1: <Allwinner AHB Clock> mem 0x1c2005c-0x1c2005f on
aw_ccu0
> > aw_gate0: <Allwinner Bus Clock Gates> mem 0x1c20060-0x1c2006f on
aw_ccu0
> > aw_mmcclk0: <Allwinner MMC Clock> mem 0x1c20088-0x1c2clk1:
<Allwinner MMC Clock> mem 0x1c2008c-0x1c2008f on aw_ccu0
> > aw_mmcclk2: <Allwinner MMC Clock> mem 0x1c20090-0x1c20093 on
aw_ccu0
> > aw_cpusclk0: <Allwinner CPUS Clock> mem 0x1f01400-0x1f01403 on
aw_ccu0
> > clk_fixed4: <Fixed factor clock> on aw_ccu0
> > aw_apbclk2: <Allwinner APB Clock> mem 0x1f0140c-0x1f0140f on
aw_ccu0
> > aw_gate1: <Allwinner APB0 Clock Gates> mem 0x1f01428-0x1f0142b
on aw_ccu0
> > aw_pll1: <Allwinner PLL Clock> mem 0x1c20044-0x1c20047 on
aw_ccu0
> > aw_usbclk0: <Allwinner USB Clocks> mem 0x1c200cc-0x1c200cf on
aw_ccu0
> > clk_fixed5: <Fixed clr GMAC Clock> mem 0x1c00030-0x1c00033 on
aw_ccu0
> > simplebus0: <Flattened device tree simple bus> on ofwbus0
> > aw_reset0: <Allwinner Module Resets> mem 0x1c202c0-0x1c202cb on
simplebus0
> > aw_reset1: <Allwinner Module Resets> mem 0x1c202d0-0x1c202d3 on
simplebus0
> > aw_reset2: <Allwinner Module Resets> mem 0x1c202d8-0x1c202db on
simplebus0
> > aw_reset3: <Allwinner Module Resets> mem 0x1f014b0-0x1f014b3 on
simplebus0
> > iichb0: <Allwinner Integrated I2C Bus Controller> mem
0x1c2ac00-0x1c2afff on simplebus0
> > iicbus0: hb0
> > iichb1: <Allwinner Integrated I2C Bus Controller> mem
0x1c2b000-0x1c2b3ff on simplebus0
> > iicbus1: <OFW I2C bus> on iichb1
> > iichb2: <Allwinner Integrated I2C Bus Controller> mem
0x1c2b400-0x1c2b7ff on simplebus0
> > iicbus2: <OFW I2C bus> on iichb2
> > regfix0: <Fixed Regulator> on ofwbus0
> > regfix1: <Fixed Regulator> on ofwbus0
> > regfix2: <Fixed Regulator> on ofwbus0
> > regfix3: <Fixed Regulator> on ofwbus0
> > regfix4: <Fixed Regulator> on ofwbus0
> > aw_sid0: <Allwinner Secure ID Controller> mem
0x1c14000-0x1c143ff on simplebus0
> > awusbphy0: <Allwinner USB PHY> on simplebu,0x1c86000-0x1c87fff
on simplebus0
> > gic0: pn 0x20, arch 0x2, rev 0x1, implementer 0x43b irqs 224
> > gpio0: <Allwinner GPIO/Pinmux controller> mem
0x1c20800-0x1c20bff on simplebus0
> > gpiobus0: <OFW GPIO bus> on gpio0
> > gpio1: <Allwinner GPIO/Pinmux controller> mem
0x1f02c00-0x1f02fff on simplebus0
> > gpiobus1: <OFW GPIO bus> on gpio1
> > aw_nmi0: <Allwinner NMI Controller> mem 0x1f00c0c-0x1f00c43 on
simplebus0
> > generic_timer0: <ARMv7 Generic Timer> on ofwbus0
> > Timecounter "cy 24000000 Hz quality 1000
> > Event timer "ARM MPCore Eventtimer" frequency 24000000 Hz
quality 1000
> > cpulist0: <Open Firmware CPU Group> on ofwbus0
> > cpu0: <Open Firmware CPU> on cpulist0
> > cpu1: <Open Firmware CPU> on cpulist0
> > cpu2: <Open Firmware CPU> on cpulist0
> > cpu3: <Open Firmware CPU> on cpulist0
> > cpu4: <Open Firmware CPU> on cpulist0
> > cpu5: <Open Firmware CPU> on cpulist0
> > cpu6: <Open Firmware CPU> on cpulist0
> > cpu7: <Open Firmware CPU> on cpulist0
> > a10_mmc0: <Allwinner Integrated MMC/SD controller> mem
0x1c0f000-0x1c0ffff on simplebus0
> > mmc0: <MMC/SD bus> on a10_mmc0
> > a10_mmc1: <Allwinner Integrated MMC/SD controller> mem
0x1c11000-0x1c11fff on simplebus0
> > mmc1: <MMC/SD bus> on a10_mmc1
> > gpioc0: <GPIO controller> on gpio0
> > aw_wdog0: <Allwinner A31 Watchdog> mem 0x1c20ca0-0x1c20cbf on
simplebus0
> > uart0: <Non-standard ns8250 class UART with FIFOs> mem
0x1c28000-0x1c283ff on simplebus0
> > uart0: console (480769,n,8,1)
> > gpioc1: <GPIO controller> on gpio1
> > iichb3: <Allwinner RSB> mem 0x1f03400-0x1f037ff on simplebus0
> > iicbus3: <OFW I2C bus> on iichb3
> > iic0: <I2C generic I/O> on iicbus3
> > axp81x_pmu0: <X-Powers AXP81x Power Management Unit> at addr
0x746 on iicbus3
> > gpiobus2: <OFW GPIO bus> on axp81x_pmu0
> > gpioled0: <GPIO led> at pin 0 on gpiobus2
> > gpioled1: <GPIO led> at pin 1 on gpiobus2
> > gpioc2: <GPIO controller> on axp81x_pmu0
> > iic1: <I2C generic I/O> on iicbus0
> > iic2: <I2C generic I/O> on iicbus1
> > iic3: <I2C generic I/O> on iicbus2
> > ehci0: <Allwinner Integrated USB 2.0 controller> mem
0x1c1a000-0x1c1a0ff on simplebus0
> > usbus0: EHCI version 1.0
> > usbus0 on ehci0
> > ehci1: <Allwinner Integrated USB 2.0 controller> mem
0x1c1b000-0x1c1b0ff on simplebus0
> > usbus1: EHCI version 1.0
> > usbus1 on ehci1
> > awg0: <Allwinner Gigabit Ethernet> mem 0x1c30000-0x1c300ff on
simplebus0
> > miibus0: <MII bus> on awg0
> > rgephy0: <RTL8169S/8110S/8211 1000BASE-T media interface> PHY 0
on miibus0
> > rgephy0:  none, 10baseT, 10baseT-FDX, 10baseT-FDX-flow, 100baseTX,
100baseTX-FDX, 100baseTX-FDX-flow, 1000baseT, 1000baseT-master, 1000baseT-FDX,
1000baseT-FDX-master, 1000baseT-FDX-flow, 1000baseT-FD
> > X-flow-master, auto, auto-flow
> > rgephy1: <RTL8169S/8110S/8211 1000BASE-T media interface> PHY 1
on miibus0
> > rgephy1:  none, 10baseT, 10baseT-FDX, 10baseT-FDX-flow, 100baseTX,
100baseTX-FDX, 100baseTX-FDX-flow, 1000baseT, 1000baseT-master, 1000baseT-FDX,
1000baseT-FDX-master, 1000baseT-FDX-flow, 1000baseT-FD
> > X-flow-master, auto, auto-flow
> > awg0: Ethernet address: f2:00:52:68:6d:d8
> > aw_thermal0: <Allwinner Thermal Sensor Controller> mem
0x1f04000-0x1f043ff on simplebus0
> > cryptosoft0: <software crypto>
> > Timecounters tick every 10.000 msec
> > usbus0: 480Mbps High Speed USB v2.0
> > usbus1: 480Mbps High Speed USB v2.0
> > ugen1.1: <Allwinner> at usbus1
> > ugen0.1: <Allwinner> at usbus0
> > uhub0: <Allwinner EHCI root HUB, class 9/0, rev 2.00/1.00, addr
1> on usbus0
> > uhub1: <Allwinner EHCI root HUB, class 9/0, rev 2.00/1.00, addr
1> on usbus1
> > mmcsd0: 32GB <SDHC 00000 1.0 SN A1535564 MFG 09/2015 by 27 SM>
at mmc0 50.0MHz/4bit/65535-block
> > a10_mmc1: error rint: 0x00000100
> > a10_mmc1: error rint: 0x00000100
> > a10_mmc1: error rint: 0x00000100
> > a10_mmc1: error rint: 0x00000100
> > a10_mmc1: error rint: 0x00000100
> > a10_mmc1: error rint: 0x00000100
> > a10_mmc1: error rint: 0x00000100
> > a10_mmc1: error rint: 0x00000100
> > a10_mmc1: error rint: 0x00008018
> > a10_mmc1: error rint: 0x00000100
> > a10_mmc1: error rint: 0x00000100
> > a10_mmc1: error rint: 0x00000100
> > a10_mmc1: error rint: 0x00000100
> > mmcsd1: 8GB <MMCHC 8WPD3R 0.0 SN E7C6641B MFG 01/2000 by 21
0x0000> at mmc1 50.0MHz/8bit/65535-block
> > Release APs
> > Trying to mount root from ufs:/dev/mmcsd0s2a [rw,noatime]...
> > warning: no time-of-day clock registered, system time will not be set
accurately
> > uhub0: 1 port with 1 removable, self powered
> > uhub1: 1 port with 1 removable, self powered
> > ugen0.2: <vendor 0x1a40> at usbus0
> > uhub2 on uhub0
> > uhub2: <vendor 0x1a40 USB 2.0 Hub, class 9/0, rev 2.00/1.11, addr
2> on usbus0
> > uhub2: 4 ports with 4 removable, self powered
> > ugen0.3: <vendor 0x05e3> at usbus0
> > umass0 on uhub2
> > umass0: <vendor 0x05e3 USB Storage, class 0/0, rev 2.00/0.16, addr
3> on usbus0
> > (probe0:umass-sim0:0:0:0): INQUIRY. CDB: 12 00 00 00 24 00 
> > (probe0:umass-sim0:0:0:0): CAM status: CCB request completed with an
error
> > (probe0:umass-sim0:0:0:0): Retrying command
> > random: unblocking device.
> > awg0: link state changed to DOWN
> > (probe0:umass-sim0:0:0:0): INQUIRY. CDB: 12 00 00 00 24 00 
> > (probe0:umass-sim0:0:0:0): CAM status: CCB request completed with an
error
> > (probe0:umass-sim0:0:0:0): Retrying command
> > awg0: link state changed to UP
> > (probe0:umass-sim0:0:0:0): INQUIRY. CDB: 12 00 00 00 24 00 
> > (probe0:umass-sim0:0:0:0): CAM status: CCB request completed with an
error
> > (probe0:umass-sim0:0:0:0): Retrying command
> > (probe0:umass-sim0:0:0:0): INQUIRY. CDB: 12 00 00 00 24 00 
> > (probe0:umass-sim0:0:0:0): CAM status: CCB request completed with an
error
> > (probe0:umass-sim0:0:0:0): Retrying command
> > (probe0:umass-sim0:0:0:0): INQUIRY. CDB: 12 00 00 00 24 00 
> > (probe0:umass-sim0:0:0:0): CAM status: CCB request completed with an
error
> > (probe0:umass-sim0:0:0:0): Error 5, Retries exhausted
> 
> So far the probe0 messages stop after just a few like the above.
> 
> Also it looks like the 8GB eMMC (mmc1 / mmcsd1) is likely not supported
yet.
> 
> I have not yet tried connecting an external usb drive.
> 
> Some structure of what was done with the cores shows in the sysctl -a
output: cpu names 0-3 and 100-103.
> 
> (Note: the serial connection tends to drop some text sometimes. That may
have happened some for the below.)
> 
> > root at bananapi-m3:~ # sysctl -a | grep cpu
> > kern.smp.cpus: 4
> > kern.smp.maxcpus: 4
> > kern.ccpu: 0
> >  <cpu count="4" mask="f">0, 1, 2,
3</cpu>
> >    <cpu count="4" mask="f">0, 1, 2,
3</cpu>
> > kern.sched.cpusetsize: 4
> > kern.pin_pcpu_swi: 0
> > kern.vt.splash_cpu_duration: 10
> > kern.vt.splash_cpu_style: 2
> > kern.vt.splash_ncpu: 0
> > kern.vt.splash_cpu: 0
> > net.inet.tcp.per_cpu_timers: 0
> > debug.PMAP1changedcpu: 106
> > debug.cpufreq.verbose: 0
> > debug.cpufreq.lowest: 0
> > hw.ncpu: 4
> > dev.cpu.7.%parent: cpulist0
> > dev.cpu.7.%pnpinfo: name=cpu at 103 compat=arm,cortex-a7
> > dev.cpu.7.%location: 
> > dev.cpu.7.%driver: cpu
> > dev.cpu.7.%desc: Open Firmware CPU
> > dev.cpu.6.%parent: cpulist0
> > dev.cpu.6.%pnpinfo: name=cpu at 102 compat=arm,cortex-a7
> > dev.cpu.6.%location: 
> > dev.cpu.6.%driver: cpu
> > dev.cpu.6.%desc: Open Firmware CPU
> > dev.cpu.5.%parent: cpulist0
> > dev.cpu.5.%pnpinfo: name=cpu at 101 compat=arm,cortex-a7
> > dev.cpu.5.%location: 
> > dev.cpu.5.%dri.5.%desc: Open Firmware CPU
> > dev.cpu.4.%parent: cpulist0
> > dev.cpu.4.%pnpinfo: name=cpu at 100 compat=arm,cortex-a7
> > dev.cpu.4.%location: 
> > dev.cpu.4.%driver: cpu
> > dev.cpu.4.%desc: Open Firmware CPU
> > dev.cpu.3.%parent: cpulist0
> > dev.cpu.3.%pnpinfo: name=cpu at 3 compat=arm,cortex-a7
> > dev.cpu.3.%location: 
> > dev.cpu.3.%driver: cpu
> > dev.cpu.3.%desc: Open Firmware CPU
> > dev.cpu.2.%parent: cpulist0
> > dev.cpu.2.%pnpinfo: name=cpu at 2 compat=arm,cortex-a7
> > dev.cpu.2.%location: 
> > dev.cpu.2.%driver: cpu
> > dev.cpu.2.%desc: Open Firmware CPU
> > dev.cpu.1.%parent: cpulist0
> > dev.cpu.1.%location: 
> > dev.cpu.1.%driver: cpu
> > dev.cpu.1.%desc: Open Firmware CPU
> > dev.cpu.0.%parent: cpulist0
> > dev.cpu.0.%pnpinfo: name=cpu at 0 compat=arm,cortex-a7
> > dev.cpu.0.%location: 
> > dev.cpu.0.%driver: cpu
> > dev.cpu.0.%desc: Open Firmware CPU
> > dev.cpu.0.%parent: cpulist0
> > dev.cpulist.0.%parent: ofwbus0
> > dev.cpulist.0.%pnpinfo: name=cpus
> > dev.cpulist.0.%location: 
> > dev.cpulist.0.%driver: cpulist
> > dev.cpulist.0.%desc: Open Firmware CPU Group
> > dev.cpulist.%parent: 
> > dev.aw_cpusclk.0.%parent: aw_ccu0
> > dev.aw_cpusclk.0.%pnpinfo: name=clk at
01f0140inner,sun8i-a83t-cpus-clk
> > dev.aw_cpusclk.0.%location: 
> > dev.aw_cpusclk.0.%driver: aw_cpusclk
> > dev.aw_cpusclk.0.%desc: Allwinner CPUS Clock
> > dev.aw_cpusclk.%parent: 
> > security.jail.param.cpuset.id: 0
> 
> 
> 
> ==> Mark Millard
> markmi at dsl-only.net
> 
> _______________________________________________
> freebsd-stable at freebsd.org mailing list
> https://lists.freebsd.org/mailman/listinfo/freebsd-stable
> To unsubscribe, send any mail to "freebsd-stable-unsubscribe at
freebsd.org"

-- 
Emmanuel Vadot <manu at bidouilliste.com> <manu at freebsd.org>

freebsd stable - Oct 2016 - BPi-M3 under stable/11 details: boots but with only 4 cores used for SMP --of 8 cores present. . .

BPi-M3 under stable/11 details: boots but with only 4 cores used for SMP --of 8 cores present. . .

BPi-M3 under stable/11 details: boots but with only 4 cores used for SMP --of 8 cores present. . .