Hi all, I''m trying to see if I can run PV guest in a very lightweight HVM container. I''ve done some basic prototype to intercept PV guest creation and try to start it in vmx container. But the vmlaunch fails with the generic code, exit reason 0x80000021, guest state invalid. I''ve been trying to debug it for many days now and to no avail. It''s unfortunate that there''s no flow diagram or more specific error codes to point to the field in problem in case vmlaunch fails. I''m trying to enter vmx in IA32-e mode. I''ve got PG/PE/PAE all set to 1. Ive the CS.L set to 1. I''m not loading EFER MSR as according to the Intel Manual, Vol 3, section 23.3.2, the LME/LMA are automatically set if entering in the IA32-e mode. Is this correct? I experimented with setting GDTR or leaving base to NULL, didn''t help. If I''m loading the CS fields, do I still need to set the GDTR? How about TR, IDTR and LDTR, do they need to be set for entry? I''ve been playing around setting/unsetting them, but keep getting the stupid invalid guest state error no matter what. Oh yes, I''m on westmere. Will appreciate any help. thanks a lot, Mukesh *** Guest State *** CR0: actual=0x0000000080010039, shadow=0x0000000080010039, gh_mask=ffffffffffffffff CR4: actual=0x0000000000002060, shadow=0x0000000000002060, gh_mask=ffffffffffffffff CR3: actual=0x00000001047ca000, target_count=0 target0=0000000000000000, target1=0000000000000000 target2=0000000000000000, target3=0000000000000000 RSP = 0xffffffff82c97000 (0xffffffff82c97000) RIP = 0xffffffff81b13200 (0xffffffff81b13200) RFLAGS=0x0000000000000002 (0x0000000000000002) DR7 = 0x0000000000000000 Sysenter RSP=0000000000000000 CS:RIP=0000:0000000000000000 (XEN) CS: sel=0x0010, attr=0x0a09b, limit=0xffffffff, base=0x0000000000000000 (XEN) DS: sel=0x0018, attr=0x0c093, limit=0xffffffff, base=0x0000000000000000 (XEN) SS: sel=0x0018, attr=0x0c093, limit=0xffffffff, base=0x0000000000000000 (XEN) ES: sel=0x0000, attr=0x00000, limit=0xffffffff, base=0x0000000000000000 (XEN) FS: sel=0x0000, attr=0x00000, limit=0xffffffff, base=0x0000000000000000 (XEN) GS: sel=0x0000, attr=0x00000, limit=0xffffffff, base=0x0000000000000000 (XEN) GDTR: limit=0xffffffff, base=0xffffffff81a4c490 (XEN) LDTR: sel=0x0000, attr=0x00082, limit=0x00000000, base=0x0000000000000000 (XEN) IDTR: limit=0x00000000, base=0x0000000000000000 (XEN) TR: sel=0x0000, attr=0x0008b, limit=0x000000ff, base=0x0000000000000000 Guest EFER = 0x0000000000000000 Guest PAT = 0x0000000000000000 TSC Offset = ffffffb472a10c04 DebugCtl=0000000000000000 DebugExceptions=0000000000000000 Interruptibility=0000 ActivityState=0000 MSRs: entry_load:0 exit_load:0 exit_store:0 *** Host State *** RSP = 0xffff82c48049ffa0 RIP = 0xffff82c4801b4710 CS=e008 DS=0000 ES=0000 FS=0000 GS=0000 SS=0000 TR=e040 FSBase=0000000000000000 GSBase=0000000000000000 TRBase=ffff82c480292a80 GDTBase=ffff82c4800f3000 IDTBase=ffff82c4804de1e0 CR0=000000008005003b CR3=00000001047ca000 CR4=00000000000026f0 Sysenter RSP=ffff82c48049ffd0 CS:RIP=e008:ffff82c4801ee2f0 Host PAT = 0x0000000000000000 *** Control State *** PinBased=0000001f CPUBased=2481e7fa SecondaryExec=00000020 EntryControls=000013fb ExitControls=0003efff ExceptionBitmap=000440c0 VMEntry: intr_info=00000000 errcode=00000000 ilen=00000000 VMExit: intr_info=00000000 errcode=00000000 ilen=00000000 reason=80000021 qualification=00000000 IDTVectoring: info=00000000 errcode=00000000 TPR Threshold = 0x00 EPT pointer = 0x0000000000000000 Virtual processor ID = 0x0001 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel
On 04/03/2011 03:21, "Mukesh Rathor" <mukesh.rathor@oracle.com> wrote:> Hi all, > > I''m trying to see if I can run PV guest in a very lightweight HVM > container. I''ve done some basic prototype to intercept PV guest creation > and try to start it in vmx container. But the vmlaunch fails with the > generic code, exit reason 0x80000021, guest state invalid. I''ve been trying > to debug it for many days now and to no avail. > > It''s unfortunate that there''s no flow diagram or more specific error codes > to point to the field in problem in case vmlaunch fails.I was going to look into this feature myself, it''s good someone else has picked it up so I don''t have to. :-) For this particular vmentry failure, Vol.3B Section 23.3.1 lists all the guest-state checks carried out on vmentry. There are quite a few of them, but you simply need to check your state dump against every check until you find a mismatch. I believe someone had a function that implemented all/most of these checks in a diagnostic helper function -- I can''t find the patch just now unfortunately. -- Keir> I''m trying to enter vmx in IA32-e mode. I''ve got PG/PE/PAE all set to 1. > Ive the CS.L set to 1. I''m not loading EFER MSR as according to the > Intel Manual, Vol 3, section 23.3.2, the LME/LMA are automatically set > if entering in the IA32-e mode. Is this correct? > > I experimented with setting GDTR or leaving base to NULL, didn''t help. If > I''m loading the CS fields, do I still need to set the GDTR? How about TR, > IDTR and LDTR, do they need to be set for entry? I''ve been playing > around setting/unsetting them, but keep getting the stupid invalid > guest state error no matter what. Oh yes, I''m on westmere. > > Will appreciate any help. > > thanks a lot, > Mukesh > > > *** Guest State *** > CR0: actual=0x0000000080010039, shadow=0x0000000080010039, > gh_mask=ffffffffffffffff > CR4: actual=0x0000000000002060, shadow=0x0000000000002060, > gh_mask=ffffffffffffffff > CR3: actual=0x00000001047ca000, target_count=0 > target0=0000000000000000, target1=0000000000000000 > target2=0000000000000000, target3=0000000000000000 > RSP = 0xffffffff82c97000 (0xffffffff82c97000) RIP = 0xffffffff81b13200 > (0xffffffff81b13200) > RFLAGS=0x0000000000000002 (0x0000000000000002) DR7 = 0x0000000000000000 > Sysenter RSP=0000000000000000 CS:RIP=0000:0000000000000000 > (XEN) CS: sel=0x0010, attr=0x0a09b, limit=0xffffffff, base=0x0000000000000000 > (XEN) DS: sel=0x0018, attr=0x0c093, limit=0xffffffff, base=0x0000000000000000 > (XEN) SS: sel=0x0018, attr=0x0c093, limit=0xffffffff, base=0x0000000000000000 > (XEN) ES: sel=0x0000, attr=0x00000, limit=0xffffffff, base=0x0000000000000000 > (XEN) FS: sel=0x0000, attr=0x00000, limit=0xffffffff, base=0x0000000000000000 > (XEN) GS: sel=0x0000, attr=0x00000, limit=0xffffffff, base=0x0000000000000000 > (XEN) GDTR: limit=0xffffffff, > base=0xffffffff81a4c490 > (XEN) LDTR: sel=0x0000, attr=0x00082, limit=0x00000000, > base=0x0000000000000000 > (XEN) IDTR: limit=0x00000000, > base=0x0000000000000000 > (XEN) TR: sel=0x0000, attr=0x0008b, limit=0x000000ff, base=0x0000000000000000 > Guest EFER = 0x0000000000000000 > Guest PAT = 0x0000000000000000 > TSC Offset = ffffffb472a10c04 > DebugCtl=0000000000000000 DebugExceptions=0000000000000000 > Interruptibility=0000 ActivityState=0000 > MSRs: entry_load:0 exit_load:0 exit_store:0 > > *** Host State *** > RSP = 0xffff82c48049ffa0 RIP = 0xffff82c4801b4710 > CS=e008 DS=0000 ES=0000 FS=0000 GS=0000 SS=0000 TR=e040 > FSBase=0000000000000000 GSBase=0000000000000000 TRBase=ffff82c480292a80 > GDTBase=ffff82c4800f3000 IDTBase=ffff82c4804de1e0 > CR0=000000008005003b CR3=00000001047ca000 CR4=00000000000026f0 > Sysenter RSP=ffff82c48049ffd0 CS:RIP=e008:ffff82c4801ee2f0 > Host PAT = 0x0000000000000000 > > *** Control State *** > PinBased=0000001f CPUBased=2481e7fa SecondaryExec=00000020 > EntryControls=000013fb ExitControls=0003efff > ExceptionBitmap=000440c0 > VMEntry: intr_info=00000000 errcode=00000000 ilen=00000000 > VMExit: intr_info=00000000 errcode=00000000 ilen=00000000 > reason=80000021 qualification=00000000 > IDTVectoring: info=00000000 errcode=00000000 > TPR Threshold = 0x00 > EPT pointer = 0x0000000000000000 > Virtual processor ID = 0x0001 > > _______________________________________________ > Xen-devel mailing list > Xen-devel@lists.xensource.com > http://lists.xensource.com/xen-devel_______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel
>>> On 04.03.11 at 04:21, Mukesh Rathor <mukesh.rathor@oracle.com> wrote: > (XEN) ES: sel=0x0000, attr=0x00000, limit=0xffffffff, > base=0x0000000000000000 > (XEN) FS: sel=0x0000, attr=0x00000, limit=0xffffffff, > base=0x0000000000000000 > (XEN) GS: sel=0x0000, attr=0x00000, limit=0xffffffff, > base=0x0000000000000000Does it help either marking these unusable (attr=0x10000) or giving them valid data segment attributes?> (XEN) GDTR: limit=0xffffffff, base=0xffffffff81a4c490Limit is restricted to 16 bits. Jan _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel
On Fri, 04 Mar 2011 07:42:07 +0000 Keir Fraser <keir.xen@gmail.com> wrote:> On 04/03/2011 03:21, "Mukesh Rathor" <mukesh.rathor@oracle.com> wrote: > > > Hi all, > I was going to look into this feature myself, it''s good someone else > has picked it up so I don''t have to. :-) > > For this particular vmentry failure, Vol.3B Section 23.3.1 lists all > the guest-state checks carried out on vmentry. There are quite a few > of them, but you simply need to check your state dump against every > check until you find a mismatch. I believe someone had a function > that implemented all/most of these checks in a diagnostic helper > function -- I can''t find the patch just now unfortunately. > > -- KeirYey, success finally! I am able to enter the vmx to the first instruction after seeing hundreds for "guest state invalid" for sometime. It appears that attrs must be set for all descriptors. That seems in conflict with somewhere in manual that null selectors cause descriptors to be ignored. I wish the vendors would provide flow chart of exact microcode execution for ''vmlaunch''. It is an assembler instruction after all, and the programmer deserves to know everything it''s doing and the order it''s doing in :)... Anyways, I hope to make good progress on it now, and if I can get my hacked up version at least stable enough, will run some benchmarks. I''m on vacation next month, but I hope to have something to report to you guys middle/end of May. thanks, Mukesh _______________________________________________ Xen-devel mailing list Xen-devel@lists.xensource.com http://lists.xensource.com/xen-devel