> Hi
>
> I would set the NX bit for a kernel pte in a PV domain. I try to do that
> from dom0 walking the page table: when l1e = l1[l1_table_offset_pae(va)];
is
> reached I try to overwrite this entry (l1[l1_table_offset_pae(va)] =
l1e_NX)
> but I receive a "segmentation fault" and PV domain crash. The
address seems
> to be correct (l1 is not unmapped). In PAE mode page table walk work fine.
> For example I can print the following informations:
>
> domU Kernel Address: c0105448
> l1e: 17489063
> l1 address mapped: b7fab000
> l1 offset: 105
> write on: b7fab105
> Segmentation Fault
>
> I can write a pte from dom0 or I must do that only from the hypervisor?
You are trying to change a DomU''s pte from Dom0, right? I
don''t think
this is possible at the moment. While Xen allows (privileged) Dom0 to
map DomU''s ''data'' pages for writing, it
won''t let you map page table
pages (Dom0 will fail to get_page_and_type(page, d, PGT_writable_page)
while trying to mod_l1_entry()). The easiest way to set NX bit, would
probably be to add another mmuext hypercall, which Dom0 can then use.
hope this helps
Gr(z)egor(z)
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