Yaotian Feng via llvm-dev
2020-Mar-06 07:01 UTC
[llvm-dev] [Backend] Lowering branch with Base + Offset addressing mode
I am currently writing a backend for a custom ISA. However, the jump and calls are all in the form of a Base + Offset. I have tried to use a Pseudo op and expand it in the /expandPostRAPseudoOp/ function, but that seems to be a bit too late. As I would need to def/use a register (I tried using regScavenger but since I also need do it in insert branch, and sometimes a MBB that I need to insert branch into has no instruction so regScavenger failed to iterate) Is there any suggestions as of what is the proper way to do this if the target effectively has only base + offset branch? Here is the repository where I keep my code, if it helps. https://github.com/transfer-learning/llvm-tl45/tree/tl45-llvm9-rust/llvm/lib/Target/TL45 Any help would be appreciated. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20200306/19c9fc4d/attachment.html>