S. Bharadwaj Yadavalli via llvm-dev
2019-Apr-11 16:46 UTC
[llvm-dev] Question regarding X86::getCondFromBranch()
Hi, I notice that the following recent addition X86::CondCode X86::getCondFromBranch(const MachineInstr &MI) { switch (MI.getOpcode()) { default: return X86::COND_INVALID; case X86::JCC_1: return static_cast<X86::CondCode>( MI.getOperand(MI.getDesc().getNumOperands() - 1).getImm()); } } returns an invalid condition for JCC_2 and JCC_4 conditional opcodes. What is the suggested way to figure out the condition code for JCC_2 and JCC_4? Should I just roll one up for myself to handle such opcodes based on the above? Am I missing something conceptually? Thanks, Bharadwaj
Craig Topper via llvm-dev
2019-Apr-11 17:18 UTC
[llvm-dev] Question regarding X86::getCondFromBranch()
Nothing in LLVM today creates a MachineInstr that has JCC_2 or JCC_4 opcode. Those only get created by assembler relaxation after everything has been converted to MCInst. Do you have your own code that is creating JCC_2/JCC_4? ~Craig On Thu, Apr 11, 2019 at 9:47 AM S. Bharadwaj Yadavalli <bharadwajy at gmail.com> wrote:> Hi, > > I notice that the following recent addition > > X86::CondCode X86::getCondFromBranch(const MachineInstr &MI) { > switch (MI.getOpcode()) { > default: return X86::COND_INVALID; > case X86::JCC_1: > return static_cast<X86::CondCode>( > MI.getOperand(MI.getDesc().getNumOperands() - 1).getImm()); > } > } > > returns an invalid condition for JCC_2 and JCC_4 conditional opcodes. > > What is the suggested way to figure out the condition code for JCC_2 and > JCC_4? > > Should I just roll one up for myself to handle such opcodes based on > the above? Am I missing something conceptually? > > Thanks, > > Bharadwaj >-------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20190411/f91945c8/attachment.html>
S. Bharadwaj Yadavalli via llvm-dev
2019-Apr-11 17:43 UTC
[llvm-dev] Question regarding X86::getCondFromBranch()
Thanks for your quick reply, Craig. On Thu, Apr 11, 2019 at 1:18 PM Craig Topper <craig.topper at gmail.com> wrote:> > Nothing in LLVM today creates a MachineInstr that has JCC_2 or JCC_4 opcode. Those only get created by assembler relaxation after everything has been converted to MCInst.OK. That is good information.> Do you have your own code that is creating JCC_2/JCC_4?I see a need for it in my LLVM-based tool that parses binaries. So far, handling JCC_2 and JCC_4 opcodes as is done in the function, seems to do the job for me. Hopefully there are no subtleties that I am ignoring. Bharadwaj