llvm dev - Apr 2019 - Can I use AArch64 Opcodes inside MachineCSE Pass

Hi All,

I have Instruction like below

%9:gpr32 = ADDWrr killed %7:gpr32, killed %4:gpr32

Here I want to check Opcode of above instruction in MachineCSE pass. But ADDWrr
is a AArch64 Opcode.
How can I use/check AArch64 Opcodes in MachineCSE pass(like: Inst->Opcode()
== AArch64::ADDWrr) ?. through any object can I use AArch64 Opcodes ?
Can I use AArch64 Opcodes inside MachineCSE Pass?

Could anyone please give your suggestions on this problem.

Thanks & Regards,
Ramakota Reddy.



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On Wed, 10 Apr 2019 at 11:45, Ramakota Reddy via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
> How can I use/check AArch64 Opcodes in MachineCSE pass(like:
Inst->Opcode() == AArch64::ADDWrr) ?. through any object can I use AArch64
Opcodes ?
You can't use target specific opcodes directly. Instead you'd add a
virtual function (maybe to TargetInstrInfo) that queries what you
really want to know about this instruction (from what you've been
saying before, whether it's an add that can be converted into a sub,
and maybe something about the operands). You'll need a similar hook to
help you with any transformation you decide to make (perhaps to get a
corresponding subtract opcode, or perhaps to just do the
transformation entirely).

MachineCSE is a bit simplistic to provide good examples of this right
now, so it might be better to look at MachineBlockPlacement and its
use of analyzeBranch (& insert/removeBranch) to see how far this kind
of thing can go. There the target is requested to perform a detailed
analysis of how a basic block ends, and return enough information to
reconstitute the control flow at a later date if necessary.

Cheers.

Tim.