Peter Lawrence via llvm-dev
2015-Sep-25 02:51 UTC
[llvm-dev] (implicit SR) v. Defs = [SR] ?
in a ".td" file what is the difference between saying (implicit FLAGS) in an instruction definition's pattern, verses saying Defs = [FLAGS]; in an instruction definition one might conclude that since not all machines that have condition codes use "implicit" that "implicit" is redundant, is this true ? TIA, -Peter Lawrence. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.llvm.org/pipermail/llvm-dev/attachments/20150925/12beea7a/attachment.html>