llvm dev - Jan 2015 - [LLVMdev] X86TargetLowering::LowerToBT

On Thu Jan 22 2015 at 3:32:53 PM Chris Sears <chris.sears at gmail.com>
wrote:
> The status quo is:
>
> a) 40b REX+BT instruction for the 64b case
> b) 48b TEST for the 32b case
> c) unless it's small TEST
>
>
> You are currently paying a 16b penalty for TEST vs BT in the 32b case.
> That may be worth testing the -Os flag.
>
You'll want -Oz here, Os isn't supposed to affect the runtime as much as
this is going to.

-eric
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If 'bt' is a perf sin, icc doesn't seem to know it:

$ icc -v
icc version 15.0.1 (gcc version 4.9.0 compatibility)

$ cat bt.c
unsigned long long IsBitSetB_64(unsigned long long val, int index) { return
(val & (1ULL<<index)) != 0ULL; }
unsigned int IsBitSetB_32(unsigned int val, int index) { return (val &
(1U<<index)) != 0U; }

$ icc -O3 -S bt.c -o - | grep bt
    .file "bt.c"
        btq       %rsi, %rdi
        btl       %esi, %edi

Does anyone at Intel have guidance for us?


On Thu, Jan 22, 2015 at 4:34 PM, Eric Christopher <echristo at gmail.com>
wrote:
>
>
> On Thu Jan 22 2015 at 3:32:53 PM Chris Sears <chris.sears at
gmail.com>
> wrote:
>
>> The status quo is:
>>
>> a) 40b REX+BT instruction for the 64b case
>> b) 48b TEST for the 32b case
>> c) unless it's small TEST
>>
>>
>> You are currently paying a 16b penalty for TEST vs BT in the 32b case.
>> That may be worth testing the -Os flag.
>>
>
> You'll want -Oz here, Os isn't supposed to affect the runtime as
much as
> this is going to.
>
> -eric
>
> _______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
>
>
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I suspect that this is because the mask in your example is the result of a
variable shift, which (a) has it’s own performance and flags hazards pre-SHLX
and (b) requires additional µops to do with TEST.  I expect that ICC is putting
a dummy TEST or XOR ahead of the BT to break the false flags dependency, as
well.

If the mask were constant, I expect ICC would generate TEST instead (but I don’t
have it handy to check).

– Steve
> On Jan 23, 2015, at 11:32 AM, Sanjay Patel <spatel at
rotateright.com> wrote:
> 
> If 'bt' is a perf sin, icc doesn't seem to know it:
> 
> $ icc -v 
> icc version 15.0.1 (gcc version 4.9.0 compatibility)
> 
> $ cat bt.c
> unsigned long long IsBitSetB_64(unsigned long long val, int index) { return
(val & (1ULL<<index)) != 0ULL; }
> unsigned int IsBitSetB_32(unsigned int val, int index) { return (val &
(1U<<index)) != 0U; }
> 
> $ icc -O3 -S bt.c -o - | grep bt
>     .file "bt.c"
>         btq       %rsi, %rdi
>         btl       %esi, %edi
> 
> Does anyone at Intel have guidance for us?
> 
> 
> On Thu, Jan 22, 2015 at 4:34 PM, Eric Christopher <echristo at gmail.com
<mailto:echristo at gmail.com>> wrote:
> 
> 
> On Thu Jan 22 2015 at 3:32:53 PM Chris Sears <chris.sears at gmail.com
<mailto:chris.sears at gmail.com>> wrote:
> The status quo is:
> 
> a) 40b REX+BT instruction for the 64b case
> b) 48b TEST for the 32b case
> c) unless it's small TEST
> 
> You are currently paying a 16b penalty for TEST vs BT in the 32b case.
> That may be worth testing the -Os flag.
> 
> You'll want -Oz here, Os isn't supposed to affect the runtime as
much as this is going to.
> 
> -eric 
> 
> _______________________________________________
> LLVM Developers mailing list
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http://llvm.cs.uiuc.edu <http://llvm.cs.uiuc.edu/>
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> 
> 
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