llvm dev - Nov 2014 - [LLVMdev] supporting SAD in loop vectorizer

Nadav and other vectorizer folks-

Is there any plan to support special idioms in the loop vectorizer like sum of
absolute difference (SAD) ? We see some useful cases where llvm is losing
performance at -O3 due to SADs not being vectorized (hence PSADBWs not being
generated).

Also, since the abs() call is already lowered to a sequence of 'icmp; neg;
select' by simplifylibcalls (in -O3), we may then need to get hold of this
pattern in the loop vectorizer (part of reduction analysis) and do the needful.

Thoughts ?

-Thx
Dibyendu

On 4 November 2014 11:06, Das, Dibyendu <Dibyendu.Das at amd.com>
wrote:
> Is there any plan to support special idioms in the loop vectorizer like sum
of absolute difference (SAD) ? We see some useful cases where llvm is losing
performance at -O3 due to SADs not being vectorized (hence PSADBWs not being
generated).
It's been a while, but this could either be that the legalisation
phase is not recognising the reduction or that the cost is not taking
into account the lowered abs().

What does -debug-only=loop-vectorize say about it?

cheers,
--renato

----- Original Message -----
> From: "Renato Golin" <renato.golin at linaro.org>
> To: "Dibyendu Das" <Dibyendu.Das at amd.com>
> Cc: llvmdev at cs.uiuc.edu
> Sent: Tuesday, November 4, 2014 5:23:30 AM
> Subject: Re: [LLVMdev] supporting SAD in loop vectorizer
> 
> On 4 November 2014 11:06, Das, Dibyendu <Dibyendu.Das at amd.com>
wrote:
> > Is there any plan to support special idioms in the loop vectorizer
> > like sum of absolute difference (SAD) ? We see some useful cases
> > where llvm is losing performance at -O3 due to SADs not being
> > vectorized (hence PSADBWs not being generated).
> 
> It's been a while, but this could either be that the legalisation
> phase is not recognising the reduction or that the cost is not taking
> into account the lowered abs().
> 
> What does -debug-only=loop-vectorize say about it?
FWIW, I agree, this sounds like a cost-model problem. The loop-vectorizer should
be able to vectorize the 'icmp; neg; select' pattern, and then the
backend can pattern-patch that with the reduction (which is a series of shuffles
and extract_element) into the single instruction PSADBW -- we're quite
likely missing the target code to do that.

 -Hal
> 
> cheers,
> --renato
> _______________________________________________
> LLVM Developers mailing list
> LLVMdev at cs.uiuc.edu         http://llvm.cs.uiuc.edu
> http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev
> 
-- 
Hal Finkel
Assistant Computational Scientist
Leadership Computing Facility
Argonne National Laboratory