llvm dev - Jul 2010 - [LLVMdev] The question of sext instruction implementation

I saw the description in llvm documenattion for sext is as the following :

-- sext (CST to TYPE)
    Sign extend a constant to another type. The bit size of CST must
be smaller or equal to the bit size of TYPE. Both types must be
integers.

But in the code of llvm-2.6, the judge condition just allow smaller to
the bit size of TYPE as the following :

  case Instruction::SExt:
    return SrcTy->isIntOrIntVector() &&
           DstTy->isIntOrIntVector()&& SrcBitSize < DstBitSize;

So I feel confused the difference about the documentation and implementation.

Thanks
MK
----------------------------------------
www.skyeye.org

Hi Michael, this was a mistake in the documentation, which I have corrected.
Note that the documentation you referred to was talking about constants while
the code you quoted was for instructions and not constants.  However the code
for constants performs an analogous check.

Ciao,

Duncan.

> I saw the description in llvm documenattion for sext is as the following :
>
> -- sext (CST to TYPE)
>      Sign extend a constant to another type. The bit size of CST must
> be smaller or equal to the bit size of TYPE. Both types must be
> integers.
>
> But in the code of llvm-2.6, the judge condition just allow smaller to
> the bit size of TYPE as the following :
>
>    case Instruction::SExt:
>      return SrcTy->isIntOrIntVector()&&
>             DstTy->isIntOrIntVector()&&  SrcBitSize< 
DstBitSize;
>
> So I feel confused the difference about the documentation and
implementation.
>
> Thanks
> MK
> ----------------------------------------
> www.skyeye.org
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