SHEN Hao
2010-Jun-04 10:18 UTC
[LLVMdev] PHI instruction -- How to avoid and how to remove?
Dear all, Is there anyone knows how to configure the llvm-gcc to avoid generate the PHI instruction in the bytecode? If not possible, can you explain me what's the real idea of the PHI instruction and how to replace this instruction with a group of other instructions? Thanks a lot. -- Hao Shen
Török Edwin
2010-Jun-04 10:22 UTC
[LLVMdev] PHI instruction -- How to avoid and how to remove?
On 06/04/2010 01:18 PM, SHEN Hao wrote:> Dear all, > > Is there anyone knows how to configure the llvm-gcc to avoid generate > the PHI instruction in the bytecode?Use opt -reg2mem (however it'll also replace all virtual registers).> If not possible, can you explain me what's the real idea of the PHI > instruction and how to replace this instruction with a group of other > instructions?It is essential to the SSA representation that LLVM uses for its analysis and transforms. Why do you want the PHI instructions removed though? They don't slow down your code when compiling to native instructions. Best regards, --Edwin
SHEN Hao
2010-Jun-07 09:33 UTC
[LLVMdev] PHI instruction -- How to avoid and how to remove?
2010/6/4 Török Edwin <edwintorok at gmail.com>:> On 06/04/2010 01:18 PM, SHEN Hao wrote: >> Dear all, >> >> Is there anyone knows how to configure the llvm-gcc to avoid generate >> the PHI instruction in the bytecode? > > Use opt -reg2mem (however it'll also replace all virtual registers).Thanks a lot. This pass works well.> >> If not possible, can you explain me what's the real idea of the PHI >> instruction and how to replace this instruction with a group of other >> instructions? > > It is essential to the SSA representation that LLVM uses for its > analysis and transforms. > > Why do you want the PHI instructions removed though? > They don't slow down your code when compiling to native instructions.For me, I need to modify all address related instructions for simulation usage. And PHI is one of them which is hard to handle because of basic block problem. For sure, my work does not target to improve the performance.> > Best regards, > --Edwin > _______________________________________________ > LLVM Developers mailing list > LLVMdev at cs.uiuc.edu http://llvm.cs.uiuc.edu > http://lists.cs.uiuc.edu/mailman/listinfo/llvmdev >-- Hao Shen
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