llvm dev - Apr 2007 - [LLVMdev] Register based vector insert/extract

How can one let the back end know how to insert and extract elements  
of a vector through sub-register copies? I'm at a loss how to do this...

--
Christopher Lamb



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On Mon, 23 Apr 2007, Christopher Lamb wrote:
> How can one let the back end know how to insert and extract elements of 
> a vector through sub-register copies? I'm at a loss how to do this...
You probably want to custom lower the insertelement/extractelement 
operations for the cases you support.  Take a look at 
X86TargetLowering::LowerEXTRACT_VECTOR_ELT for some examples of how to do 
this.

-Chris

-- 
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On Apr 23, 2007, at 12:31 PM, Chris Lattner wrote:
> On Mon, 23 Apr 2007, Christopher Lamb wrote:
>> How can one let the back end know how to insert and extract  
>> elements of
>> a vector through sub-register copies? I'm at a loss how to do
this...
>
> You probably want to custom lower the insertelement/extractelement
> operations for the cases you support.  Take a look at
> X86TargetLowering::LowerEXTRACT_VECTOR_ELT for some examples of how  
> to do
> this.
The issue I'm having is that there is no extract/insert instruction  
in the ISA, it's simply based on using subregister operands in  
subsequent/preliminary instructions. At the pointer of custom  
lowering register allocation has not yet been done, so I don't have a  
way to communicate the dependency.

--
Christopher Lamb



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