Add support for cpu notification chain. This is useful with nested virtualization when Xen runs as l1 hypervisor. This cleans up mce initialization cleanup as a side-effect. Signed-off-by: Christoph Egger <Christoph.Egger@amd.com> -- ---to satisfy European Law for business letters: Advanced Micro Devices GmbH Einsteinring 24, 85689 Dornach b. Muenchen Geschaeftsfuehrer: Alberto Bozzo Sitz: Dornach, Gemeinde Aschheim, Landkreis Muenchen Registergericht Muenchen, HRB Nr. 43632 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel
>>> On 25.10.12 at 15:54, Christoph Egger <Christoph.Egger@amd.com> wrote: > Add support for cpu notification chain. > This is useful with nested virtualization when Xen > runs as l1 hypervisor. > This cleans up mce initialization cleanup as a side-effect.Did you notice the fix I had done to your earlier patch before committing c/s 26106:1883c1d29de9? With the change here, mce_clear_banks will get allocated twice (once in generic code and once in AMD specific code), leaking one instance. Jan
On 10/25/12 16:10, Jan Beulich wrote:>>>> On 25.10.12 at 15:54, Christoph Egger <Christoph.Egger@amd.com> wrote: >> Add support for cpu notification chain. >> This is useful with nested virtualization when Xen >> runs as l1 hypervisor. >> This cleans up mce initialization cleanup as a side-effect. > > Did you notice the fix I had done to your earlier patch before > committing c/s 26106:1883c1d29de9? With the change here, > mce_clear_banks will get allocated twice (once in generic code > and once in AMD specific code), leaking one instance.Ugh... must be a merge botch. Christoph -- ---to satisfy European Law for business letters: Advanced Micro Devices GmbH Einsteinring 24, 85689 Dornach b. Muenchen Geschaeftsfuehrer: Alberto Bozzo Sitz: Dornach, Gemeinde Aschheim, Landkreis Muenchen Registergericht Muenchen, HRB Nr. 43632
On 10/25/12 16:18, Christoph Egger wrote:> On 10/25/12 16:10, Jan Beulich wrote: >>>>> On 25.10.12 at 15:54, Christoph Egger <Christoph.Egger@amd.com> wrote: >>> Add support for cpu notification chain. >>> This is useful with nested virtualization when Xen >>> runs as l1 hypervisor. >>> This cleans up mce initialization cleanup as a side-effect. >> >> Did you notice the fix I had done to your earlier patch before >> committing c/s 26106:1883c1d29de9? With the change here, >> mce_clear_banks will get allocated twice (once in generic code >> and once in AMD specific code), leaking one instance. > > Ugh... must be a merge botch.Updated patch attached. Signed-off-by: Christoph Egger <Christoph.Egger@amd.com> -- ---to satisfy European Law for business letters: Advanced Micro Devices GmbH Einsteinring 24, 85689 Dornach b. Muenchen Geschaeftsfuehrer: Alberto Bozzo Sitz: Dornach, Gemeinde Aschheim, Landkreis Muenchen Registergericht Muenchen, HRB Nr. 43632 _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel
>>> On 25.10.12 at 16:45, Christoph Egger <Christoph.Egger@amd.com> wrote: > On 10/25/12 16:18, Christoph Egger wrote: >> On 10/25/12 16:10, Jan Beulich wrote: >>>>>> On 25.10.12 at 15:54, Christoph Egger <Christoph.Egger@amd.com> wrote: >>>> Add support for cpu notification chain. >>>> This is useful with nested virtualization when Xen >>>> runs as l1 hypervisor. >>>> This cleans up mce initialization cleanup as a side-effect. >>> >>> Did you notice the fix I had done to your earlier patch before >>> committing c/s 26106:1883c1d29de9? With the change here, >>> mce_clear_banks will get allocated twice (once in generic code >>> and once in AMD specific code), leaking one instance. >> >> Ugh... must be a merge botch. > > Updated patch attached. > > Signed-off-by: Christoph Egger <Christoph.Egger@amd.com>Subject and patch don''t really fit together anymore. This is mostly cleanup (code movement) now, and I wonder whether this>+amd_cpu_callback(struct notifier_block *nfb, unsigned long action, void *hcpu) >+{ >+ int rc = 0; >+ >+ switch (action) { >+ case CPU_DYING: >+ clear_in_cr4(X86_CR4_MCE); >+ break;if needed at all, isn''t rather to be put in generic code (you might need to settle on this with the Intel folks). In any case it would need an explanation in the commit message. Jan
On 10/25/12 16:57, Jan Beulich wrote:>>>> On 25.10.12 at 16:45, Christoph Egger <Christoph.Egger@amd.com> wrote: >> On 10/25/12 16:18, Christoph Egger wrote: >>> On 10/25/12 16:10, Jan Beulich wrote: >>>>>>> On 25.10.12 at 15:54, Christoph Egger <Christoph.Egger@amd.com> wrote: >>>>> Add support for cpu notification chain. >>>>> This is useful with nested virtualization when Xen >>>>> runs as l1 hypervisor. >>>>> This cleans up mce initialization cleanup as a side-effect. >>>> >>>> Did you notice the fix I had done to your earlier patch before >>>> committing c/s 26106:1883c1d29de9? With the change here, >>>> mce_clear_banks will get allocated twice (once in generic code >>>> and once in AMD specific code), leaking one instance. >>> >>> Ugh... must be a merge botch. >> >> Updated patch attached. >> >> Signed-off-by: Christoph Egger <Christoph.Egger@amd.com> > > Subject and patch don''t really fit together anymore. This is > mostly cleanup (code movement) now, and I wonder whether > thisWill adjust and resend. Christoph -- ---to satisfy European Law for business letters: Advanced Micro Devices GmbH Einsteinring 24, 85689 Dornach b. Muenchen Geschaeftsfuehrer: Alberto Bozzo Sitz: Dornach, Gemeinde Aschheim, Landkreis Muenchen Registergericht Muenchen, HRB Nr. 43632