Jan Beulich
2012-Sep-17 08:12 UTC
[PATCH] x86/Intel: add further support for Ivy Bridge CPU models
And some initial Haswell ones at once. Signed-off-by: Jan Beulich <jbeulich@suse.com> --- a/xen/arch/x86/acpi/cpu_idle.c +++ b/xen/arch/x86/acpi/cpu_idle.c @@ -105,11 +105,15 @@ static void do_get_hw_residencies(void * switch ( c->x86_model ) { - /* Ivy bridge */ - case 0x3A: /* Sandy bridge */ case 0x2A: case 0x2D: + /* Ivy bridge */ + case 0x3A: + case 0x3E: + /* Haswell */ + case 0x3c: + case 0x45: GET_PC2_RES(hw_res->pc2); GET_CC7_RES(hw_res->cc7); /* fall through */ --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -1731,7 +1731,9 @@ static const struct lbr_info *last_branc /* Sandy Bridge */ case 42: case 45: /* Ivy Bridge */ - case 58: + case 58: case 62: + /* Haswell */ + case 60: case 69: return nh_lbr; break; /* Atom */ --- a/xen/arch/x86/hvm/vmx/vpmu_core2.c +++ b/xen/arch/x86/hvm/vmx/vpmu_core2.c @@ -747,6 +747,7 @@ int vmx_vpmu_initialise(struct vcpu *v, case 46: case 47: case 58: + case 62: ret = core2_vpmu_initialise(v, vpmu_flags); if ( !ret ) vpmu->arch_vpmu_ops = &core2_vpmu_ops; _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel
Jan Beulich
2012-Sep-28 08:20 UTC
Ping: [PATCH] x86/Intel: add further support for Ivy Bridge CPU models
x86/Intel: add further support for Ivy Bridge CPU models And some initial Haswell ones at once. Signed-off-by: Jan Beulich <jbeulich@suse.com> --- a/xen/arch/x86/acpi/cpu_idle.c +++ b/xen/arch/x86/acpi/cpu_idle.c @@ -128,11 +128,15 @@ static void do_get_hw_residencies(void * switch ( c->x86_model ) { - /* Ivy bridge */ - case 0x3A: /* Sandy bridge */ case 0x2A: case 0x2D: + /* Ivy bridge */ + case 0x3A: + case 0x3E: + /* Haswell */ + case 0x3c: + case 0x45: GET_PC2_RES(hw_res->pc2); GET_CC7_RES(hw_res->cc7); /* fall through */ --- a/xen/arch/x86/hvm/vmx/vmx.c +++ b/xen/arch/x86/hvm/vmx/vmx.c @@ -1746,7 +1746,9 @@ static const struct lbr_info *last_branc /* Sandy Bridge */ case 42: case 45: /* Ivy Bridge */ - case 58: + case 58: case 62: + /* Haswell */ + case 60: case 69: return nh_lbr; break; /* Atom */ --- a/xen/arch/x86/hvm/vmx/vpmu_core2.c +++ b/xen/arch/x86/hvm/vmx/vpmu_core2.c @@ -747,6 +747,7 @@ int vmx_vpmu_initialise(struct vcpu *v, case 46: case 47: case 58: + case 62: ret = core2_vpmu_initialise(v, vpmu_flags); if ( !ret ) vpmu->arch_vpmu_ops = &core2_vpmu_ops; _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel
Nakajima, Jun
2012-Oct-01 14:57 UTC
Re: Ping: [PATCH] x86/Intel: add further support for Ivy Bridge CPU models
On Fri, Sep 28, 2012 at 1:20 AM, Jan Beulich <JBeulich@suse.com> wrote:> > x86/Intel: add further support for Ivy Bridge CPU models > > And some initial Haswell ones at once. > > Signed-off-by: Jan Beulich <jbeulich@suse.com> > > --- a/xen/arch/x86/acpi/cpu_idle.c > +++ b/xen/arch/x86/acpi/cpu_idle.c > @@ -128,11 +128,15 @@ static void do_get_hw_residencies(void * > > switch ( c->x86_model ) > { > - /* Ivy bridge */ > - case 0x3A: > /* Sandy bridge */ > case 0x2A: > case 0x2D: > + /* Ivy bridge */ > + case 0x3A: > + case 0x3E: > + /* Haswell */ > + case 0x3c: > + case 0x45: > GET_PC2_RES(hw_res->pc2); > GET_CC7_RES(hw_res->cc7); > /* fall through */ > --- a/xen/arch/x86/hvm/vmx/vmx.c > +++ b/xen/arch/x86/hvm/vmx/vmx.c > @@ -1746,7 +1746,9 @@ static const struct lbr_info *last_branc > /* Sandy Bridge */ > case 42: case 45: > /* Ivy Bridge */ > - case 58: > + case 58: case 62: > + /* Haswell */ > + case 60: case 69: > return nh_lbr; > break; > /* Atom */ > --- a/xen/arch/x86/hvm/vmx/vpmu_core2.c > +++ b/xen/arch/x86/hvm/vmx/vpmu_core2.c > @@ -747,6 +747,7 @@ int vmx_vpmu_initialise(struct vcpu *v, > case 46: > case 47: > case 58: > + case 62: > ret = core2_vpmu_initialise(v, vpmu_flags); > if ( !ret ) > vpmu->arch_vpmu_ops = &core2_vpmu_ops; > > >Looks good to me. -- Jun Intel Open Source Technology Center