On 17/08/2012 17:25, "Jan Beulich" <JBeulich@suse.com> wrote:
> So far we only ever set up the respective MSRs on Intel CPUs, yet we
> hide the feature only on a 32-bit hypervisor. That prevents booting of
> PV guests on top of a 64-bit hypervisor making use of the instruction
> on unknown CPUs (VIA in this case).
>
> Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Keir Fraser <keir@xen.org>
> --- a/xen/arch/x86/cpu/common.c
> +++ b/xen/arch/x86/cpu/common.c
> @@ -55,6 +55,7 @@ static void default_init(struct cpuinfo_
> /* Not much we can do here... */
> /* Check if at least it has cpuid */
> BUG_ON(c->cpuid_level == -1);
> + __clear_bit(X86_FEATURE_SEP, c->x86_capability);
> }
>
> static struct cpu_dev default_cpu = {
>
>
>
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