Release 2.21.0 (2013-02-01)
==========================A few new features:
* Enable render acceleration for Haswell GT1/GT2.
* Enable multi-threaded rasterisation of trapezoids and fallback composition
* Utilile a new kernel interface (v3.9) for processing relocations
along with a few older features from the 2.20.x series:
* PRIME support for hotplug GPUs and hybrid systems
* Support for IvyBridge GT1 machines, aka HD2500 graphics.
* Stable 830gm/845g support, at last!
As usual we have a large number of bug fixes since the last release:
* Prevent a stray relocation being left after a buffer is removed from
a batch, leading to GPU hangs.
* Make the driver more robust against its own failures to submit batches
by falling back to software rendering.
* Fix emission of scanline waits for secondary pipes on gen6/7. Otherwise
you may encounter GPU hangs in MI_WAIT_FOR_EVENT.
* Fix a missing corner pixel when drawing rectangles with PolyLines
https://bugs.freedesktop.org/show_bug.cgi?id=55484
* Don't try to use Y-tiling colour buffers with mesa/i915c as mesa
doesn't support them and wil fallback to software rendering
* Ensure that any cached mmaps are invalidated for a SwapBuffers
https://bugs.freedesktop.org/show_bug.cgi?id=60042
* Correctly handle the composition of rotated displays too large for the
3D pipeline
https://bugs.freedesktop.org/show_bug.cgi?id=60124
* Fix the computation of the planar video frame size
https://bugs.launchpad.net/ubuntu/+source/xserver-xorg-video-intel/+bug/1104180
Chris Wilson (74):
sna/gen3: Always close the vertices for a batch, even if the vbo is empty
sna: Adapt error detection and handling for invalid batchbuffers
sna/gen3+: Handle flushing vbo for CA glyphs
sna/gen3+: Reset vertex relocation state after discarding the batch
sna/gen3+: And restore non-CA compositing state after the CA pass
sna/gen6: Tweak programming scanline values
sna/gen3+: Remove bogus assertion that the vbo in included before finish
sna/gen7: Offset start/end scanlines by one
sna/gen7: Place the vsync commands in the same cacheline
sna: New execbuffer flags for lut-handle and fast-relocs are upstream
sna: Only add bound scanouts to the scanout list
sna: Assert that if marked as a scanout it is indeed bound.
sna: Use the maximum backlight value if we fail to read the current value
sna: Free a non-reusable bo if it expires on the flushing list
sna/gen7: Fix inversion of bool return code from CA pass
sna: Extend rectangular PolyLines to cover corner pixels on ccw paths
sna/gen7: Correct the event definition for secondary pipes for
MI_WAIT_FOR_EVENT
sna/gen6: Correct the event definition for secondary pipes for
MI_WAIT_FOR_EVENT
sna/dri: Prefer to use the BLT ring for vsync'ed copies on IVB+
sna: Clean up WAIT_FOR_EVENT on gen2/3
sna/dri: Stop feeding I915_TILING_Y to mesa i915c
sna/dri: Only reject DRI2 buffers that are too small for the request blit
sna/dri: Don't contribute missed frames to the target_msc
sna: Experiment with a threaded renderer for fallback compositing
sna: Refactor to use a common fbComposite fallback
sna/dri: Compensate clipExtents for drawable offset
sna: Use threads for simple mask generation
sna: Tidy construction of data for threaded composite
sna: Parse cpuinfo to determine the actual number of physical cores/caches
sna: Perform the last threaded composite operation directly
sna: Spawn threads to composite trapezoids inplace
sna: Spawn threads to rasterize trapezoids through pixman
sna: Begin sketching out a threaded rasteriser for spans
sna: Enable threaded rasterisation for non-antialiased geometry
sna: Disable all signals in the render threads
sna: Add the pixmap to the flushing list when creating for inplace CPU
writes
sna: Replace the forced vertex finish with just a wait
sna: Fix typo in vertex count for threaded source span emitter
sna: Add some more paranoia that we correctly map before fallbacks
sna: Add GT1/GT2 thread counts for Haswell
sna/gen3+: Fix a DBG for composite_boxes()
sna: Avoid promoting SHM CPU bo to GPU to maintain coherence with SHM
clients
sna: Verify that we always add the SHM CPU bo to the flush list when using
sna: Only migrate the sample box if using the BLT engine for a composite
sna: Before replacing the devPrivate.ptr assert it is not already mapped
sna: Only discard the mapping prior to the actual read when uploading
sna/dri: Make sure we discard the existing mappings when swapping GPU bo
sna: Return early if the Drawable box exactly matches one CRTC
sna: Fix errors found from asserts in a66c5f9ed51e
uxa: Harden against failures to submit batchbuffers
sna: Prefer to use snooped buffers for readbacks
sna: Relax assertion the the kernel considers the bo idle when we call
retire
sna: Retire the bo after a set-domain(CPU,0)
sna: Don't force a migration from CPU rendering for a DRI2 flushed
pixmap
sna: Only discard the clear hint when writing inplace to the GPU pixmap
sna: Pass the correct WRITE hint when migrating for rendering into the CPU
bo
sna: Add a bunch of assertions to make sure we do not misplace scanouts
sna/dri: Handle change of BackBuffer across a pending flip
sna: Improve DBG output for damaged slave outputs
sna: Prevent falling back to swrast if source is on the GPU
sna: Disable dangerous assertions that depend upon external state
sna: Stage retirement through the flushing list
sna/traps: Translate the extents for the rasterization threads
sna/traps: Allow inplace compositing for non-GPU buffers and rectilinear
traps
sna/traps: Thread the fallback rectilinear compositor
sna: After removing the bo from a batch, check whether it is still busy
sna: Remember to move scanouts to the scanout cache after retiring
sna: Pass width/height to composite for rotated displays
sna: Remove stale assertion
sna: Make sure the needs_flush is always accompanied by a tracking request
sna/gen3+: Flush vertex threads before touching global state
sna/video: Correct computation of planar frame size
sna: Assert that if we have GPU damage we have a GPU bo
2.21.0 release
git tag: 2.21.0
http://xorg.freedesktop.org/archive/individual/driver/xf86-video-intel-2.21.0.tar.bz2
MD5: f029cc261fca75b32ba85b9c4189db88 xf86-video-intel-2.21.0.tar.bz2
SHA1: cce3f932264ceb6449360ad7d938d74f697c9522 xf86-video-intel-2.21.0.tar.bz2
SHA256: d872adef06cbf1a4434811baad4b8a18feacc6633b59b36557e8d7db7161081c
xf86-video-intel-2.21.0.tar.bz2
http://xorg.freedesktop.org/archive/individual/driver/xf86-video-intel-2.21.0.tar.gz
MD5: ab12fda1098b7f2e617045583fa71ba6 xf86-video-intel-2.21.0.tar.gz
SHA1: 69cc0b03c3eac20504d05816b799a444719c2a51 xf86-video-intel-2.21.0.tar.gz
SHA256: faf3c5f0e90cbf49c331242875648510a678557427ee1eda8d1bb335460d346d
xf86-video-intel-2.21.0.tar.gz
--
Chris Wilson, Intel Open Source Technology Centre
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