search for: srar

...d-off-by: Jan Beulich <jbeulich@suse.com> Committed-by: Jan Beulich <jbeulich@suse.com> changeset: 24410:25f8952313ae user: Liu, Jinsong <jinsong.liu@intel.com> date: Thu Dec 15 10:58:53 2011 +0100 x86/MCE: add more strict sanity check of one SRAR case When RIPV = EIPV = 0, it''s a little bit tricky. It may be an asynchronic error, currently we have no way to precisely locate whether the error occur at guest or hypervisor. To avoid handling error in wrong way, we treat it as unrecovered. Signed-off-by: Liu, Jins...

...d-off-by: Jan Beulich <jbeulich@suse.com> Committed-by: Jan Beulich <jbeulich@suse.com> changeset: 24410:25f8952313ae user: Liu, Jinsong <jinsong.liu@intel.com> date: Thu Dec 15 10:58:53 2011 +0100 x86/MCE: add more strict sanity check of one SRAR case When RIPV = EIPV = 0, it''s a little bit tricky. It may be an asynchronic error, currently we have no way to precisely locate whether the error occur at guest or hypervisor. To avoid handling error in wrong way, we treat it as unrecovered. Signed-off-by: Liu, Jins...

Xen/MCE: vMCE injection In our test for win8 guest mce, we find a bug that no matter what SRAO/SRAR error xen inject to win8 guest, it always reboot. The root cause is, current Xen vMCE logic inject vMCE# only to vcpu0, this is not correct for Intel MCE (Under Intel arch, h/w generate MCE# to all CPUs). This patch fix vMCE injection bug, injecting vMCE# to all vcpus. Signed-off-by: Liu, Jinson...

Hi, This is updated xen vMCE design foils, according to comments from community recently. This foils focus on vMCE part of Xen MCA, so as Keir said, it''s some dense. Later Will will present a document to elaborate more, including Intel MCA and surrounding features and Xen implementation. Thanks, Jinsong