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Karol Herbst

2015-Oct-12 20:27 UTC

[Nouveau] [PATCH 0/9] PCIe speed changes

this patch series implements PCIe speed changes for Tesla and newer.

The Kepler and Fermi bits are tested on my cards at home.

Karol Herbst (9):
  pci: add gk104 variant
  pci: add gf106 variant
  pci: implement generic code for PCIe speed change
  pci: implement pcie speed change for tesla
  pci: implement pcie speed change on Fermi
  pci: implement PCIe speed change for kepler+
  bios/perf: parse the pci speed from the bios for tesla and newer cards
  perf: add fields for pci speed and width and use it for the pstates
  perf: change pcie speed on pstate change

 drm/nouveau/include/nvkm/subdev/bios/perf.h |   2 +
 drm/nouveau/include/nvkm/subdev/clk.h       |   3 +
 drm/nouveau/include/nvkm/subdev/pci.h       |  14 ++
 drm/nouveau/nvkm/engine/device/base.c       |  30 ++--
 drm/nouveau/nvkm/subdev/bios/perf.c         |  16 ++
 drm/nouveau/nvkm/subdev/clk/base.c          |   9 ++
 drm/nouveau/nvkm/subdev/pci/Kbuild          |   3 +
 drm/nouveau/nvkm/subdev/pci/base.c          |   5 +
 drm/nouveau/nvkm/subdev/pci/g84.c           | 113 +++++++++++++
 drm/nouveau/nvkm/subdev/pci/g94.c           |  10 ++
 drm/nouveau/nvkm/subdev/pci/gf100.c         |  70 ++++++++
 drm/nouveau/nvkm/subdev/pci/gf106.c         |  48 ++++++
 drm/nouveau/nvkm/subdev/pci/gk104.c         | 238 ++++++++++++++++++++++++++++
 drm/nouveau/nvkm/subdev/pci/pcie.c          | 159 +++++++++++++++++++
 drm/nouveau/nvkm/subdev/pci/priv.h          |  28 ++++
 15 files changed, 733 insertions(+), 15 deletions(-)
 create mode 100644 drm/nouveau/nvkm/subdev/pci/gf106.c
 create mode 100644 drm/nouveau/nvkm/subdev/pci/gk104.c
 create mode 100644 drm/nouveau/nvkm/subdev/pci/pcie.c

-- 
2.6.1

Karol Herbst

2015-Oct-12 20:27 UTC

head link

[Nouveau] [PATCH 1/9] pci: add gk104 variant

Signed-off-by: Karol Herbst <nouveau at karolherbst.de>
---
 drm/nouveau/include/nvkm/subdev/pci.h |  1 +
 drm/nouveau/nvkm/engine/device/base.c | 20 +++++++++---------
 drm/nouveau/nvkm/subdev/pci/Kbuild    |  1 +
 drm/nouveau/nvkm/subdev/pci/gk104.c   | 38 +++++++++++++++++++++++++++++++++++
 4 files changed, 50 insertions(+), 10 deletions(-)
 create mode 100644 drm/nouveau/nvkm/subdev/pci/gk104.c

diff --git a/drm/nouveau/include/nvkm/subdev/pci.h
b/drm/nouveau/include/nvkm/subdev/pci.h
index fee0a97..1cf5f72 100644
--- a/drm/nouveau/include/nvkm/subdev/pci.h
+++ b/drm/nouveau/include/nvkm/subdev/pci.h
@@ -34,4 +34,5 @@ int nv4c_pci_new(struct nvkm_device *, int, struct nvkm_pci
**);
 int g84_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
 int g94_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
 int gf100_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
+int gk104_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
 #endif
diff --git a/drm/nouveau/nvkm/engine/device/base.c
b/drm/nouveau/nvkm/engine/device/base.c
index 439c003..9c10c84 100644
--- a/drm/nouveau/nvkm/engine/device/base.c
+++ b/drm/nouveau/nvkm/engine/device/base.c
@@ -1669,7 +1669,7 @@ nve4_chipset = {
 	.mc = gf100_mc_new,
 	.mmu = gf100_mmu_new,
 	.mxm = nv50_mxm_new,
-	.pci = g94_pci_new,
+	.pci = gk104_pci_new,
 	.pmu = gk104_pmu_new,
 	.therm = gf119_therm_new,
 	.timer = nv41_timer_new,
@@ -1706,7 +1706,7 @@ nve6_chipset = {
 	.mc = gf100_mc_new,
 	.mmu = gf100_mmu_new,
 	.mxm = nv50_mxm_new,
-	.pci = g94_pci_new,
+	.pci = gk104_pci_new,
 	.pmu = gk104_pmu_new,
 	.therm = gf119_therm_new,
 	.timer = nv41_timer_new,
@@ -1743,7 +1743,7 @@ nve7_chipset = {
 	.mc = gf100_mc_new,
 	.mmu = gf100_mmu_new,
 	.mxm = nv50_mxm_new,
-	.pci = g94_pci_new,
+	.pci = gk104_pci_new,
 	.pmu = gk104_pmu_new,
 	.therm = gf119_therm_new,
 	.timer = nv41_timer_new,
@@ -1804,7 +1804,7 @@ nvf0_chipset = {
 	.mc = gf100_mc_new,
 	.mmu = gf100_mmu_new,
 	.mxm = nv50_mxm_new,
-	.pci = g94_pci_new,
+	.pci = gk104_pci_new,
 	.pmu = gk110_pmu_new,
 	.therm = gf119_therm_new,
 	.timer = nv41_timer_new,
@@ -1840,7 +1840,7 @@ nvf1_chipset = {
 	.mc = gf100_mc_new,
 	.mmu = gf100_mmu_new,
 	.mxm = nv50_mxm_new,
-	.pci = g94_pci_new,
+	.pci = gk104_pci_new,
 	.pmu = gk110_pmu_new,
 	.therm = gf119_therm_new,
 	.timer = nv41_timer_new,
@@ -1876,7 +1876,7 @@ nv106_chipset = {
 	.mc = gk20a_mc_new,
 	.mmu = gf100_mmu_new,
 	.mxm = nv50_mxm_new,
-	.pci = g94_pci_new,
+	.pci = gk104_pci_new,
 	.pmu = gk208_pmu_new,
 	.therm = gf119_therm_new,
 	.timer = nv41_timer_new,
@@ -1912,7 +1912,7 @@ nv108_chipset = {
 	.mc = gk20a_mc_new,
 	.mmu = gf100_mmu_new,
 	.mxm = nv50_mxm_new,
-	.pci = g94_pci_new,
+	.pci = gk104_pci_new,
 	.pmu = gk208_pmu_new,
 	.therm = gf119_therm_new,
 	.timer = nv41_timer_new,
@@ -1948,7 +1948,7 @@ nv117_chipset = {
 	.mc = gk20a_mc_new,
 	.mmu = gf100_mmu_new,
 	.mxm = nv50_mxm_new,
-	.pci = g94_pci_new,
+	.pci = gk104_pci_new,
 	.pmu = gm107_pmu_new,
 	.therm = gm107_therm_new,
 	.timer = gk20a_timer_new,
@@ -1979,7 +1979,7 @@ nv124_chipset = {
 	.mc = gk20a_mc_new,
 	.mmu = gf100_mmu_new,
 	.mxm = nv50_mxm_new,
-	.pci = g94_pci_new,
+	.pci = gk104_pci_new,
 	.pmu = gm107_pmu_new,
 	.timer = gk20a_timer_new,
 	.volt = gk104_volt_new,
@@ -2010,7 +2010,7 @@ nv126_chipset = {
 	.mc = gk20a_mc_new,
 	.mmu = gf100_mmu_new,
 	.mxm = nv50_mxm_new,
-	.pci = g94_pci_new,
+	.pci = gk104_pci_new,
 	.pmu = gm107_pmu_new,
 	.timer = gk20a_timer_new,
 	.volt = gk104_volt_new,
diff --git a/drm/nouveau/nvkm/subdev/pci/Kbuild
b/drm/nouveau/nvkm/subdev/pci/Kbuild
index 4476ef7..1a29869 100644
--- a/drm/nouveau/nvkm/subdev/pci/Kbuild
+++ b/drm/nouveau/nvkm/subdev/pci/Kbuild
@@ -7,3 +7,4 @@ nvkm-y += nvkm/subdev/pci/nv4c.o
 nvkm-y += nvkm/subdev/pci/g84.o
 nvkm-y += nvkm/subdev/pci/g94.o
 nvkm-y += nvkm/subdev/pci/gf100.o
+nvkm-y += nvkm/subdev/pci/gk104.o
diff --git a/drm/nouveau/nvkm/subdev/pci/gk104.c
b/drm/nouveau/nvkm/subdev/pci/gk104.c
new file mode 100644
index 0000000..95ecc51
--- /dev/null
+++ b/drm/nouveau/nvkm/subdev/pci/gk104.c
@@ -0,0 +1,38 @@
+/*
+ * Copyright 2015 Karol Herbst
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
"Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Karol Herbst <git at karolherbst.de>
+ */
+#include "priv.h"
+
+static const struct nvkm_pci_func
+gk104_pci_func = {
+	.rd32 = nv40_pci_rd32,
+	.wr08 = nv40_pci_wr08,
+	.wr32 = nv40_pci_wr32,
+	.msi_rearm = nv40_pci_msi_rearm,
+};
+
+int
+gk104_pci_new(struct nvkm_device *device, int index, struct nvkm_pci **ppci)
+{
+	return nvkm_pci_new_(&gk104_pci_func, device, index, ppci);
+}
-- 
2.6.1

Karol Herbst

2015-Oct-12 20:27 UTC

head link

[Nouveau] [PATCH 2/9] pci: add gf106 variant

Signed-off-by: Karol Herbst <nouveau at karolherbst.de>
---
 drm/nouveau/include/nvkm/subdev/pci.h |  1 +
 drm/nouveau/nvkm/engine/device/base.c | 10 ++++-----
 drm/nouveau/nvkm/subdev/pci/Kbuild    |  1 +
 drm/nouveau/nvkm/subdev/pci/gf106.c   | 38 +++++++++++++++++++++++++++++++++++
 4 files changed, 45 insertions(+), 5 deletions(-)
 create mode 100644 drm/nouveau/nvkm/subdev/pci/gf106.c

diff --git a/drm/nouveau/include/nvkm/subdev/pci.h
b/drm/nouveau/include/nvkm/subdev/pci.h
index 1cf5f72..17fe7b7 100644
--- a/drm/nouveau/include/nvkm/subdev/pci.h
+++ b/drm/nouveau/include/nvkm/subdev/pci.h
@@ -34,5 +34,6 @@ int nv4c_pci_new(struct nvkm_device *, int, struct nvkm_pci
**);
 int g84_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
 int g94_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
 int gf100_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
+int gf106_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
 int gk104_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
 #endif
diff --git a/drm/nouveau/nvkm/engine/device/base.c
b/drm/nouveau/nvkm/engine/device/base.c
index 9c10c84..653da48 100644
--- a/drm/nouveau/nvkm/engine/device/base.c
+++ b/drm/nouveau/nvkm/engine/device/base.c
@@ -1388,7 +1388,7 @@ nvc1_chipset = {
 	.mc = gf100_mc_new,
 	.mmu = gf100_mmu_new,
 	.mxm = nv50_mxm_new,
-	.pci = g94_pci_new,
+	.pci = gf106_pci_new,
 	.pmu = gf100_pmu_new,
 	.therm = gt215_therm_new,
 	.timer = nv41_timer_new,
@@ -1423,7 +1423,7 @@ nvc3_chipset = {
 	.mc = gf100_mc_new,
 	.mmu = gf100_mmu_new,
 	.mxm = nv50_mxm_new,
-	.pci = g94_pci_new,
+	.pci = gf106_pci_new,
 	.pmu = gf100_pmu_new,
 	.therm = gt215_therm_new,
 	.timer = nv41_timer_new,
@@ -1566,7 +1566,7 @@ nvcf_chipset = {
 	.mc = gf100_mc_new,
 	.mmu = gf100_mmu_new,
 	.mxm = nv50_mxm_new,
-	.pci = g94_pci_new,
+	.pci = gf106_pci_new,
 	.pmu = gf100_pmu_new,
 	.therm = gt215_therm_new,
 	.timer = nv41_timer_new,
@@ -1601,7 +1601,7 @@ nvd7_chipset = {
 	.mc = gf100_mc_new,
 	.mmu = gf100_mmu_new,
 	.mxm = nv50_mxm_new,
-	.pci = g94_pci_new,
+	.pci = gf106_pci_new,
 	.therm = gf119_therm_new,
 	.timer = nv41_timer_new,
 	.ce[0] = gf100_ce_new,
@@ -1634,7 +1634,7 @@ nvd9_chipset = {
 	.mc = gf100_mc_new,
 	.mmu = gf100_mmu_new,
 	.mxm = nv50_mxm_new,
-	.pci = g94_pci_new,
+	.pci = gf106_pci_new,
 	.pmu = gf119_pmu_new,
 	.therm = gf119_therm_new,
 	.timer = nv41_timer_new,
diff --git a/drm/nouveau/nvkm/subdev/pci/Kbuild
b/drm/nouveau/nvkm/subdev/pci/Kbuild
index 1a29869..724afd4 100644
--- a/drm/nouveau/nvkm/subdev/pci/Kbuild
+++ b/drm/nouveau/nvkm/subdev/pci/Kbuild
@@ -7,4 +7,5 @@ nvkm-y += nvkm/subdev/pci/nv4c.o
 nvkm-y += nvkm/subdev/pci/g84.o
 nvkm-y += nvkm/subdev/pci/g94.o
 nvkm-y += nvkm/subdev/pci/gf100.o
+nvkm-y += nvkm/subdev/pci/gf106.o
 nvkm-y += nvkm/subdev/pci/gk104.o
diff --git a/drm/nouveau/nvkm/subdev/pci/gf106.c
b/drm/nouveau/nvkm/subdev/pci/gf106.c
new file mode 100644
index 0000000..a3d451e
--- /dev/null
+++ b/drm/nouveau/nvkm/subdev/pci/gf106.c
@@ -0,0 +1,38 @@
+/*
+ * Copyright 2015 Karol Herbst
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
"Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Karol Herbst <git at karolherbst.de>
+ */
+#include "priv.h"
+
+static const struct nvkm_pci_func
+gf106_pci_func = {
+	.rd32 = nv40_pci_rd32,
+	.wr08 = nv40_pci_wr08,
+	.wr32 = nv40_pci_wr32,
+	.msi_rearm = nv40_pci_msi_rearm,
+};
+
+int
+gf106_pci_new(struct nvkm_device *device, int index, struct nvkm_pci **ppci)
+{
+	return nvkm_pci_new_(&gf106_pci_func, device, index, ppci);
+}
-- 
2.6.1

Karol Herbst

2015-Oct-12 20:27 UTC

head link

[Nouveau] [PATCH 3/9] pci: implement generic code for PCIe speed change

Signed-off-by: Karol Herbst <nouveau at karolherbst.de>
---
 drm/nouveau/include/nvkm/subdev/pci.h |  12 +++
 drm/nouveau/nvkm/subdev/pci/Kbuild    |   1 +
 drm/nouveau/nvkm/subdev/pci/base.c    |   5 ++
 drm/nouveau/nvkm/subdev/pci/pcie.c    | 159 ++++++++++++++++++++++++++++++++++
 drm/nouveau/nvkm/subdev/pci/priv.h    |  12 +++
 5 files changed, 189 insertions(+)
 create mode 100644 drm/nouveau/nvkm/subdev/pci/pcie.c

diff --git a/drm/nouveau/include/nvkm/subdev/pci.h
b/drm/nouveau/include/nvkm/subdev/pci.h
index 17fe7b7..e195736 100644
--- a/drm/nouveau/include/nvkm/subdev/pci.h
+++ b/drm/nouveau/include/nvkm/subdev/pci.h
@@ -2,6 +2,12 @@
 #define __NVKM_PCI_H__
 #include <core/subdev.h>
 
+enum nvkm_pcie_speed {
+	NVKM_PCIE_SPEED_2_5,
+	NVKM_PCIE_SPEED_5_0,
+	NVKM_PCIE_SPEED_8_0,
+};
+
 struct nvkm_pci {
 	const struct nvkm_pci_func *func;
 	struct nvkm_subdev subdev;
@@ -18,6 +24,11 @@ struct nvkm_pci {
 		bool acquired;
 	} agp;
 
+	struct {
+		enum nvkm_pcie_speed last_speed;
+		u8 last_width;
+	} pcie;
+
 	bool msi;
 };
 
@@ -26,6 +37,7 @@ void nvkm_pci_wr08(struct nvkm_pci *, u16 addr, u8 data);
 void nvkm_pci_wr32(struct nvkm_pci *, u16 addr, u32 data);
 u32 nvkm_pci_mask(struct nvkm_pci *, u16 addr, u32 mask, u32 value);
 void nvkm_pci_rom_shadow(struct nvkm_pci *, bool shadow);
+int nvkm_pci_set_pcie_link(struct nvkm_pci *, enum nvkm_pcie_speed, u8 width);
 
 int nv04_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
 int nv40_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
diff --git a/drm/nouveau/nvkm/subdev/pci/Kbuild
b/drm/nouveau/nvkm/subdev/pci/Kbuild
index 724afd4..3c2519f 100644
--- a/drm/nouveau/nvkm/subdev/pci/Kbuild
+++ b/drm/nouveau/nvkm/subdev/pci/Kbuild
@@ -1,5 +1,6 @@
 nvkm-y += nvkm/subdev/pci/agp.o
 nvkm-y += nvkm/subdev/pci/base.o
+nvkm-y += nvkm/subdev/pci/pcie.o
 nvkm-y += nvkm/subdev/pci/nv04.o
 nvkm-y += nvkm/subdev/pci/nv40.o
 nvkm-y += nvkm/subdev/pci/nv46.o
diff --git a/drm/nouveau/nvkm/subdev/pci/base.c
b/drm/nouveau/nvkm/subdev/pci/base.c
index d671dcf..3895ab2 100644
--- a/drm/nouveau/nvkm/subdev/pci/base.c
+++ b/drm/nouveau/nvkm/subdev/pci/base.c
@@ -117,6 +117,9 @@ nvkm_pci_init(struct nvkm_subdev *subdev)
 		ret = nvkm_agp_init(pci);
 		if (ret)
 			return ret;
+	} else {
+		if (pci_is_pcie(pci->pdev))
+			nvkm_pci_pcie_init(pci);
 	}
 
 	if (pci->func->init)
@@ -160,6 +163,8 @@ nvkm_pci_new_(const struct nvkm_pci_func *func, struct
nvkm_device *device,
 	pci->func = func;
 	pci->pdev = device->func->pci(device)->pdev;
 	pci->irq = -1;
+	pci->pcie.last_speed = -1;
+	pci->pcie.last_width = -1;
 
 	if (device->type == NVKM_DEVICE_AGP)
 		nvkm_agp_ctor(pci);
diff --git a/drm/nouveau/nvkm/subdev/pci/pcie.c
b/drm/nouveau/nvkm/subdev/pci/pcie.c
new file mode 100644
index 0000000..05e9c55
--- /dev/null
+++ b/drm/nouveau/nvkm/subdev/pci/pcie.c
@@ -0,0 +1,159 @@
+/*
+ * Copyright 2015 Karol Herbst
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
"Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Karol Herbst <git at karolherbst.de>
+ */
+#include "priv.h"
+
+static char *pcie_speed_strings[] = {
+	"2.5GT/s",
+	"5.0GT/s",
+	"8.0GT/s",
+};
+
+static enum nvkm_pcie_speed
+pci_bus_speed_to_nvkm_pcie_speed(enum pci_bus_speed speed)
+{
+	switch (speed) {
+	case PCIE_SPEED_2_5GT:
+		return NVKM_PCIE_SPEED_2_5;
+	case PCIE_SPEED_5_0GT:
+		return NVKM_PCIE_SPEED_5_0;
+	case PCIE_SPEED_8_0GT:
+		return NVKM_PCIE_SPEED_8_0;
+	default:
+		if (speed == 0x17) // 0x16 is 8_0, assume 0x17 will be 16_0 for now
+			return NVKM_PCIE_SPEED_8_0;
+		return -1;
+	}
+}
+
+static s8
+nvkm_pci_get_pcie_version(struct nvkm_pci *pci)
+{
+	if (!pci_is_pcie(pci->pdev))
+		return -ENODEV;
+
+	if (!pci->func->get_pcie_version)
+		return -ENOSYS;
+
+	return pci->func->get_pcie_version(pci);
+}
+
+static s8
+nvkm_pci_raise_pcie_version(struct nvkm_pci *pci)
+{
+	int ret, supported;
+
+	if (!pci_is_pcie(pci->pdev))
+		return -ENODEV;
+
+	if (!pci->func->set_pcie_version ||
!pci->func->get_pcie_version_supported)
+		return -ENOSYS;
+
+	ret = nvkm_pci_get_pcie_version(pci);
+	supported = pci->func->get_pcie_version_supported(pci);
+	if (ret == 1 && ret < supported) {
+		nvkm_debug(&pci->subdev, "raising version\n");
+		pci->func->set_pcie_version(pci, supported);
+		ret = nvkm_pci_get_pcie_version(pci);
+	}
+	return ret >= supported ? ret : -EINVAL;
+}
+
+int
+nvkm_pci_pcie_init(struct nvkm_pci *pci)
+{
+	struct nvkm_subdev *subdev = &pci->subdev;
+	int ret;
+
+	if (!pci_is_pcie(pci->pdev))
+		return -ENODEV;
+
+	// raise pcie version first
+	ret = nvkm_pci_raise_pcie_version(pci);
+	if (ret <= 0)
+		nvkm_error(subdev, "couldn't raise version: %i\n", ret);
+
+	if (pci->func->pcie_speed_init)
+		pci->func->pcie_speed_init(pci);
+
+	nvkm_info(subdev, "pcie version: %i\n",
nvkm_pci_get_pcie_version(pci));
+	if (pci->func->pcie_max_speed)
+		nvkm_info(subdev, "pcie max speed: %s\n",
pcie_speed_strings[pci->func->pcie_max_speed(pci)]);
+
+	if (pci->pcie.last_speed != -1)
+		nvkm_pci_set_pcie_link(pci, pci->pcie.last_speed,
pci->pcie.last_width);
+
+	return 0;
+}
+
+int
+nvkm_pci_set_pcie_link(struct nvkm_pci * pci, enum nvkm_pcie_speed req_speed,
u8 req_width)
+{
+	struct nvkm_subdev *subdev = &pci->subdev;
+	enum nvkm_pcie_speed sys_cur_speed, sys_max_speed;
+	struct pci_bus *pbus = pci->pdev->bus;
+	int ret;
+
+	if (!pci_is_pcie(pci->pdev))
+		return -ENODEV;
+
+	if (!pci->func->pcie_speed_set || !pci->func->get_pcie_version ||
!pci->func->pcie_max_speed || !pci->func->pcie_current_speed)
+		return -ENOSYS;
+
+	nvkm_debug(subdev, "pcie speed %s requested\n",
pcie_speed_strings[req_speed]);
+
+	if (pci->func->get_pcie_version(pci) < 2) {
+		nvkm_error(subdev, "can't change link speed, "
+				"because current version too low\n");
+		return -ENODEV;
+	}
+
+	sys_cur_speed = pci->func->pcie_current_speed(pci);
+	sys_max_speed = min(pci_bus_speed_to_nvkm_pcie_speed(pbus->max_bus_speed),
pci->func->pcie_max_speed(pci));
+
+	nvkm_debug(subdev, "bus current speed: %s max speed: %s\n",
+			pcie_speed_strings[sys_cur_speed], pcie_speed_strings[sys_max_speed]);
+
+	if (req_speed > sys_max_speed) {
+		req_speed = sys_max_speed;
+		nvkm_warn(subdev, "bus or card not fast enough, dropping "
+				"requested speed to %s", pcie_speed_strings[req_speed]);
+	}
+
+	pci->pcie.last_speed = req_speed;
+	pci->pcie.last_width = req_width;
+
+	if (req_speed == sys_cur_speed) {
+		nvkm_debug(subdev, "requested speed matches current speed
already\n");
+		return req_speed;
+	}
+
+	nvkm_debug(subdev, "set link to speed: %s width: x%i\n",
+			pcie_speed_strings[req_speed], req_width);
+	ret = pci->func->pcie_speed_set(pci, req_speed, req_width);
+
+	if (ret < 0)
+		nvkm_error(subdev, "setting link failed with ret: %i\n", ret);
+
+	return ret;
+}
diff --git a/drm/nouveau/nvkm/subdev/pci/priv.h
b/drm/nouveau/nvkm/subdev/pci/priv.h
index cf46d38..11c266f 100644
--- a/drm/nouveau/nvkm/subdev/pci/priv.h
+++ b/drm/nouveau/nvkm/subdev/pci/priv.h
@@ -12,6 +12,16 @@ struct nvkm_pci_func {
 	void (*wr08)(struct nvkm_pci *, u16 addr, u8 data);
 	void (*wr32)(struct nvkm_pci *, u16 addr, u32 data);
 	void (*msi_rearm)(struct nvkm_pci *);
+
+	int (*pcie_speed_init)(struct nvkm_pci *);
+	int (*pcie_speed_set)(struct nvkm_pci *, enum nvkm_pcie_speed, u8);
+
+	enum nvkm_pcie_speed (*pcie_max_speed)(struct nvkm_pci *);
+	enum nvkm_pcie_speed (*pcie_current_speed)(struct nvkm_pci *);
+
+	void (*set_pcie_version)(struct nvkm_pci *, u8);
+	u8 (*get_pcie_version)(struct nvkm_pci *);
+	u8 (*get_pcie_version_supported)(struct nvkm_pci *);
 };
 
 u32 nv40_pci_rd32(struct nvkm_pci *, u16);
@@ -22,4 +32,6 @@ void nv40_pci_msi_rearm(struct nvkm_pci *);
 void nv46_pci_msi_rearm(struct nvkm_pci *);
 
 void g84_pci_init(struct nvkm_pci *pci);
+
+int nvkm_pci_pcie_init(struct nvkm_pci *pci);
 #endif
-- 
2.6.1

Karol Herbst

2015-Oct-12 20:27 UTC

head link

[Nouveau] [PATCH 4/9] pci: implement pcie speed change for tesla

Signed-off-by: Karol Herbst <nouveau at karolherbst.de>
---
 drm/nouveau/nvkm/subdev/pci/g84.c   | 113 ++++++++++++++++++++++++++++++++++++
 drm/nouveau/nvkm/subdev/pci/g94.c   |  10 ++++
 drm/nouveau/nvkm/subdev/pci/gf100.c |   5 ++
 drm/nouveau/nvkm/subdev/pci/gf106.c |   5 ++
 drm/nouveau/nvkm/subdev/pci/gk104.c |   2 +
 drm/nouveau/nvkm/subdev/pci/priv.h  |   9 +++
 6 files changed, 144 insertions(+)

diff --git a/drm/nouveau/nvkm/subdev/pci/g84.c
b/drm/nouveau/nvkm/subdev/pci/g84.c
index 3faa6bf..e53208e 100644
--- a/drm/nouveau/nvkm/subdev/pci/g84.c
+++ b/drm/nouveau/nvkm/subdev/pci/g84.c
@@ -25,6 +25,109 @@
 
 #include <core/pci.h>
 
+u8
+g84_get_pcie_version_supported(struct nvkm_pci *pci)
+{
+	u32 chipset = pci->subdev.device->chipset, reg_v;
+
+	/* these cards report wrong information about what they support */
+	if (chipset == 0x84 || chipset == 0x86)
+		return 1;
+
+	reg_v = nvkm_pci_rd32(pci, 0x460) & 0x200;
+	if (reg_v == 0x200)
+		return 2;
+	return 1;
+}
+
+void
+g84_set_pcie_version(struct nvkm_pci *pci, u8 ver)
+{
+	struct nvkm_device *device = pci->subdev.device;
+
+	if (ver > 1)
+		ver = 1;
+	else
+		ver = 0;
+
+	nvkm_mask(device, 0x00154c, 0x1, ver);
+}
+
+u8
+g84_get_pcie_version(struct nvkm_pci *pci)
+{
+	struct nvkm_device *device = pci->subdev.device;
+	return (nvkm_rd32(device, 0x00154c) & 0x1) + 1;
+}
+
+static void
+g84_set_pcie_cap_speed(struct nvkm_pci *pci, bool full_speed)
+{
+	struct nvkm_device *device = pci->subdev.device;
+	nvkm_mask(device, 0x00154c, 0x80, full_speed ? 0x80 : 0x0);
+}
+
+enum nvkm_pcie_speed
+g84_get_real_speed(struct nvkm_pci *pci)
+{
+	u32 reg_v = nvkm_pci_rd32(pci, 0x88) & 0x30000;
+	switch (reg_v) {
+		case 0x30000:
+			return NVKM_PCIE_SPEED_8_0;
+		case 0x20000:
+			return NVKM_PCIE_SPEED_5_0;
+		case 0x10000:
+		default:
+			return NVKM_PCIE_SPEED_2_5;
+	}
+}
+
+enum nvkm_pcie_speed
+g84_get_pcie_max_speed(struct nvkm_pci *pci)
+{
+	u32 reg_v = nvkm_pci_rd32(pci, 0x460) & 0x3300;
+	if (reg_v == 0x2200)
+		return NVKM_PCIE_SPEED_5_0;
+	return NVKM_PCIE_SPEED_2_5;
+}
+
+void
+g84_set_pcie_sta_speed(struct nvkm_pci *pci, enum nvkm_pcie_speed speed)
+{
+	u32 mask_value;
+
+	if (speed == NVKM_PCIE_SPEED_5_0)
+		mask_value = 0x20;
+	else
+		mask_value = 0x10;
+
+	nvkm_pci_mask(pci, 0x460, 0x30, mask_value);
+	nvkm_pci_mask(pci, 0x460, 0x1, 0x1);
+}
+
+int
+g84_pcie_speed_init(struct nvkm_pci *pci)
+{
+	if (g84_get_real_speed(pci) == NVKM_PCIE_SPEED_2_5)
+		g84_set_pcie_cap_speed(pci, false);
+	else
+		g84_set_pcie_cap_speed(pci, true);
+	return 0;
+}
+
+int
+g84_pcie_speed_set(struct nvkm_pci *pci, enum nvkm_pcie_speed req_speed, u8
req_width)
+{
+	if (req_speed == NVKM_PCIE_SPEED_5_0)
+		g84_set_pcie_cap_speed(pci, true);
+	else
+		g84_set_pcie_cap_speed(pci, false);
+
+	g84_set_pcie_sta_speed(pci, req_speed);
+
+	return 0;
+}
+
 void
 g84_pci_init(struct nvkm_pci *pci)
 {
@@ -55,6 +158,16 @@ g84_pci_func = {
 	.wr08 = nv40_pci_wr08,
 	.wr32 = nv40_pci_wr32,
 	.msi_rearm = nv46_pci_msi_rearm,
+
+	.pcie_speed_init = g84_pcie_speed_init,
+	.pcie_speed_set = g84_pcie_speed_set,
+
+	.pcie_max_speed = g84_get_pcie_max_speed,
+	.pcie_current_speed = g84_get_real_speed,
+
+	.set_pcie_version = g84_set_pcie_version,
+	.get_pcie_version = g84_get_pcie_version,
+	.get_pcie_version_supported = g84_get_pcie_version_supported,
 };
 
 int
diff --git a/drm/nouveau/nvkm/subdev/pci/g94.c
b/drm/nouveau/nvkm/subdev/pci/g94.c
index cd311ee..1431041 100644
--- a/drm/nouveau/nvkm/subdev/pci/g94.c
+++ b/drm/nouveau/nvkm/subdev/pci/g94.c
@@ -30,6 +30,16 @@ g94_pci_func = {
 	.wr08 = nv40_pci_wr08,
 	.wr32 = nv40_pci_wr32,
 	.msi_rearm = nv40_pci_msi_rearm,
+
+	.pcie_speed_init = g84_pcie_speed_init,
+	.pcie_speed_set = g84_pcie_speed_set,
+
+	.pcie_max_speed = g84_get_pcie_max_speed,
+	.pcie_current_speed = g84_get_real_speed,
+
+	.set_pcie_version = g84_set_pcie_version,
+	.get_pcie_version = g84_get_pcie_version,
+	.get_pcie_version_supported = g84_get_pcie_version_supported,
 };
 
 int
diff --git a/drm/nouveau/nvkm/subdev/pci/gf100.c
b/drm/nouveau/nvkm/subdev/pci/gf100.c
index 25e1ae7..bd88dd5 100644
--- a/drm/nouveau/nvkm/subdev/pci/gf100.c
+++ b/drm/nouveau/nvkm/subdev/pci/gf100.c
@@ -36,6 +36,11 @@ gf100_pci_func = {
 	.wr08 = nv40_pci_wr08,
 	.wr32 = nv40_pci_wr32,
 	.msi_rearm = gf100_pci_msi_rearm,
+
+	.pcie_max_speed = g84_get_pcie_max_speed,
+	.pcie_current_speed = g84_get_real_speed,
+
+	.get_pcie_version_supported = g84_get_pcie_version_supported,
 };
 
 int
diff --git a/drm/nouveau/nvkm/subdev/pci/gf106.c
b/drm/nouveau/nvkm/subdev/pci/gf106.c
index a3d451e..e2223b9 100644
--- a/drm/nouveau/nvkm/subdev/pci/gf106.c
+++ b/drm/nouveau/nvkm/subdev/pci/gf106.c
@@ -29,6 +29,11 @@ gf106_pci_func = {
 	.wr08 = nv40_pci_wr08,
 	.wr32 = nv40_pci_wr32,
 	.msi_rearm = nv40_pci_msi_rearm,
+
+	.pcie_max_speed = g84_get_pcie_max_speed,
+	.pcie_current_speed = g84_get_real_speed,
+
+	.get_pcie_version_supported = g84_get_pcie_version_supported,
 };
 
 int
diff --git a/drm/nouveau/nvkm/subdev/pci/gk104.c
b/drm/nouveau/nvkm/subdev/pci/gk104.c
index 95ecc51..7b6bb5b 100644
--- a/drm/nouveau/nvkm/subdev/pci/gk104.c
+++ b/drm/nouveau/nvkm/subdev/pci/gk104.c
@@ -29,6 +29,8 @@ gk104_pci_func = {
 	.wr08 = nv40_pci_wr08,
 	.wr32 = nv40_pci_wr32,
 	.msi_rearm = nv40_pci_msi_rearm,
+
+	.pcie_current_speed = g84_get_real_speed,
 };
 
 int
diff --git a/drm/nouveau/nvkm/subdev/pci/priv.h
b/drm/nouveau/nvkm/subdev/pci/priv.h
index 11c266f..9c62164 100644
--- a/drm/nouveau/nvkm/subdev/pci/priv.h
+++ b/drm/nouveau/nvkm/subdev/pci/priv.h
@@ -33,5 +33,14 @@ void nv46_pci_msi_rearm(struct nvkm_pci *);
 
 void g84_pci_init(struct nvkm_pci *pci);
 
+void g84_set_pcie_version(struct nvkm_pci *, u8);
+u8 g84_get_pcie_version(struct nvkm_pci *);
+u8 g84_get_pcie_version_supported(struct nvkm_pci *);
+void g84_set_pcie_sta_speed(struct nvkm_pci *, enum nvkm_pcie_speed);
+enum nvkm_pcie_speed g84_get_real_speed(struct nvkm_pci *);
+enum nvkm_pcie_speed g84_get_pcie_max_speed(struct nvkm_pci *);
+int g84_pcie_speed_init(struct nvkm_pci *);
+int g84_pcie_speed_set(struct nvkm_pci *, enum nvkm_pcie_speed, u8);
+
 int nvkm_pci_pcie_init(struct nvkm_pci *pci);
 #endif
-- 
2.6.1

Karol Herbst

2015-Oct-12 20:27 UTC

head link

[Nouveau] [PATCH 5/9] pci: implement pcie speed change on Fermi

Signed-off-by: Karol Herbst <nouveau at karolherbst.de>
---
 drm/nouveau/nvkm/subdev/pci/gf100.c | 65 +++++++++++++++++++++++++++++++++++++
 drm/nouveau/nvkm/subdev/pci/gf106.c |  5 +++
 drm/nouveau/nvkm/subdev/pci/gk104.c |  3 ++
 drm/nouveau/nvkm/subdev/pci/priv.h  |  7 ++++
 4 files changed, 80 insertions(+)

diff --git a/drm/nouveau/nvkm/subdev/pci/gf100.c
b/drm/nouveau/nvkm/subdev/pci/gf100.c
index bd88dd5..535d858 100644
--- a/drm/nouveau/nvkm/subdev/pci/gf100.c
+++ b/drm/nouveau/nvkm/subdev/pci/gf100.c
@@ -29,6 +29,66 @@ gf100_pci_msi_rearm(struct nvkm_pci *pci)
 	nvkm_pci_wr08(pci, 0x0704, 0xff);
 }
 
+void
+gf100_set_pcie_version(struct nvkm_pci *pci, u8 ver)
+{
+	struct nvkm_device *device = pci->subdev.device;
+
+	if (ver > 1)
+		ver = 1;
+	else
+		ver = 0;
+
+	nvkm_mask(device, 0x02241c, 0x1, ver);
+}
+
+u8
+gf100_get_pcie_version(struct nvkm_pci *pci)
+{
+	struct nvkm_device *device = pci->subdev.device;
+	return (nvkm_rd32(device, 0x02241c) & 0x1) + 1;
+}
+
+void
+gf100_set_pcie_cap_speed(struct nvkm_pci *pci, bool full_speed)
+{
+	struct nvkm_device *device = pci->subdev.device;
+	nvkm_mask(device, 0x02241c, 0x80, full_speed ? 0x80 : 0x0);
+}
+
+int
+gf100_get_pcie_cap_speed(struct nvkm_pci *pci)
+{
+	struct nvkm_device *device = pci->subdev.device;
+	u8 punits_pci_cap_speed = nvkm_rd32(device, 0x02241c) & 0x80;
+	if (punits_pci_cap_speed == 0x80)
+		return 1;
+	return 0;
+}
+
+int
+gf100_pcie_speed_init(struct nvkm_pci *pci)
+{
+	if (g84_get_real_speed(pci) == NVKM_PCIE_SPEED_2_5)
+		gf100_set_pcie_cap_speed(pci, false);
+	else
+		gf100_set_pcie_cap_speed(pci, true);
+	return 0;
+}
+
+int
+gf100_pcie_speed_set(struct nvkm_pci *pci, enum nvkm_pcie_speed req_speed, u8
req_width)
+{
+	if (req_speed == NVKM_PCIE_SPEED_5_0)
+		gf100_set_pcie_cap_speed(pci, true);
+	else
+		gf100_set_pcie_cap_speed(pci, false);
+
+	g84_set_pcie_sta_speed(pci, req_speed);
+
+	return 0;
+}
+
 static const struct nvkm_pci_func
 gf100_pci_func = {
 	.init = g84_pci_init,
@@ -37,9 +97,14 @@ gf100_pci_func = {
 	.wr32 = nv40_pci_wr32,
 	.msi_rearm = gf100_pci_msi_rearm,
 
+	.pcie_speed_init = gf100_pcie_speed_init,
+	.pcie_speed_set = gf100_pcie_speed_set,
+
 	.pcie_max_speed = g84_get_pcie_max_speed,
 	.pcie_current_speed = g84_get_real_speed,
 
+	.set_pcie_version = gf100_set_pcie_version,
+	.get_pcie_version = gf100_get_pcie_version,
 	.get_pcie_version_supported = g84_get_pcie_version_supported,
 };
 
diff --git a/drm/nouveau/nvkm/subdev/pci/gf106.c
b/drm/nouveau/nvkm/subdev/pci/gf106.c
index e2223b9..0dee9b5 100644
--- a/drm/nouveau/nvkm/subdev/pci/gf106.c
+++ b/drm/nouveau/nvkm/subdev/pci/gf106.c
@@ -30,9 +30,14 @@ gf106_pci_func = {
 	.wr32 = nv40_pci_wr32,
 	.msi_rearm = nv40_pci_msi_rearm,
 
+	.pcie_speed_init = gf100_pcie_speed_init,
+	.pcie_speed_set = gf100_pcie_speed_set,
+
 	.pcie_max_speed = g84_get_pcie_max_speed,
 	.pcie_current_speed = g84_get_real_speed,
 
+	.set_pcie_version = gf100_set_pcie_version,
+	.get_pcie_version = gf100_get_pcie_version,
 	.get_pcie_version_supported = g84_get_pcie_version_supported,
 };
 
diff --git a/drm/nouveau/nvkm/subdev/pci/gk104.c
b/drm/nouveau/nvkm/subdev/pci/gk104.c
index 7b6bb5b..353630f 100644
--- a/drm/nouveau/nvkm/subdev/pci/gk104.c
+++ b/drm/nouveau/nvkm/subdev/pci/gk104.c
@@ -31,6 +31,9 @@ gk104_pci_func = {
 	.msi_rearm = nv40_pci_msi_rearm,
 
 	.pcie_current_speed = g84_get_real_speed,
+
+	.set_pcie_version = gf100_set_pcie_version,
+	.get_pcie_version = gf100_get_pcie_version,
 };
 
 int
diff --git a/drm/nouveau/nvkm/subdev/pci/priv.h
b/drm/nouveau/nvkm/subdev/pci/priv.h
index 9c62164..348d629 100644
--- a/drm/nouveau/nvkm/subdev/pci/priv.h
+++ b/drm/nouveau/nvkm/subdev/pci/priv.h
@@ -43,4 +43,11 @@ int g84_pcie_speed_init(struct nvkm_pci *);
 int g84_pcie_speed_set(struct nvkm_pci *, enum nvkm_pcie_speed, u8);
 
 int nvkm_pci_pcie_init(struct nvkm_pci *pci);
+
+void gf100_set_pcie_version(struct nvkm_pci *, u8);
+u8 gf100_get_pcie_version(struct nvkm_pci *);
+void gf100_set_pcie_cap_speed(struct nvkm_pci *, bool);
+int gf100_get_pcie_cap_speed(struct nvkm_pci *);
+int gf100_pcie_speed_init(struct nvkm_pci *);
+int gf100_pcie_speed_set(struct nvkm_pci *, enum nvkm_pcie_speed, u8);
 #endif
-- 
2.6.1

Karol Herbst

2015-Oct-12 20:27 UTC

head link

[Nouveau] [PATCH 6/9] pci: implement PCIe speed change for kepler+

Signed-off-by: Karol Herbst <nouveau at karolherbst.de>
---
 drm/nouveau/nvkm/subdev/pci/gk104.c | 195 ++++++++++++++++++++++++++++++++++++
 1 file changed, 195 insertions(+)

diff --git a/drm/nouveau/nvkm/subdev/pci/gk104.c
b/drm/nouveau/nvkm/subdev/pci/gk104.c
index 353630f..a663f9a 100644
--- a/drm/nouveau/nvkm/subdev/pci/gk104.c
+++ b/drm/nouveau/nvkm/subdev/pci/gk104.c
@@ -23,6 +23,196 @@
  */
 #include "priv.h"
 
+static u32
+gk104_pci2_rd32(struct nvkm_pci *pci, u16 addr)
+{
+	struct nvkm_device *device = pci->subdev.device;
+	return nvkm_rd32(device, 0x08c000 + addr);
+}
+
+static void
+gk104_pci2_mask(struct nvkm_pci *pci, u16 addr, u32 mask, u32 value)
+{
+	struct nvkm_device *device = pci->subdev.device;
+	nvkm_mask(device, 0x08c000 + addr, mask, value);
+}
+
+static u8
+gk104_get_pcie_version_supported(struct nvkm_pci *pci)
+{
+	return (gk104_pci2_rd32(pci, 0x1c0) & 0x4) == 0x4 ? 2 : 1;
+}
+
+static void
+gk104_set_pcie_cap_speed(struct nvkm_pci *pci, enum nvkm_pcie_speed speed)
+{
+	switch (speed) {
+	case NVKM_PCIE_SPEED_2_5:
+		gf100_set_pcie_cap_speed(pci, false);
+		gk104_pci2_mask(pci, 0x1c0, 0x30000, 0x10000);
+		break;
+	case NVKM_PCIE_SPEED_5_0:
+		gf100_set_pcie_cap_speed(pci, true);
+		gk104_pci2_mask(pci, 0x1c0, 0x30000, 0x20000);
+		break;
+	case NVKM_PCIE_SPEED_8_0:
+		gf100_set_pcie_cap_speed(pci, true);
+		gk104_pci2_mask(pci, 0x1c0, 0x30000, 0x30000);
+		break;
+	}
+}
+
+static enum nvkm_pcie_speed
+gk104_get_pcie_cap_speed(struct nvkm_pci *pci)
+{
+	int speed = gf100_get_pcie_cap_speed(pci);
+	if (speed < 0)
+		return speed;
+
+	if (speed == 0)
+		return NVKM_PCIE_SPEED_2_5;
+
+	if (speed >= 1) {
+		int speed2 = gk104_pci2_rd32(pci, 0x1c0) & 0x30000;
+		switch (speed2) {
+		case 0x00000:
+		case 0x10000:
+			return NVKM_PCIE_SPEED_2_5;
+		case 0x20000:
+			return NVKM_PCIE_SPEED_5_0;
+		case 0x30000:
+			return NVKM_PCIE_SPEED_8_0;
+		}
+	}
+	return -EINVAL;
+}
+
+static void
+gk104_set_pcie_lnkctl_speed(struct nvkm_pci *pci, enum nvkm_pcie_speed speed)
+{
+	u8 reg_v = 0;
+	switch (speed) {
+	case NVKM_PCIE_SPEED_2_5:
+		reg_v = 1;
+		break;
+	case NVKM_PCIE_SPEED_5_0:
+		reg_v = 2;
+		break;
+	case NVKM_PCIE_SPEED_8_0:
+		reg_v = 3;
+		break;
+	}
+	nvkm_pci_mask(pci, 0xa8, 0x3, reg_v);
+}
+
+static enum nvkm_pcie_speed
+gk104_get_pcie_lnkctl_speed(struct nvkm_pci *pci)
+{
+	u8 reg_v = nvkm_pci_rd32(pci, 0xa8) & 0x3;
+	switch (reg_v) {
+	case 0:
+	case 1:
+		return NVKM_PCIE_SPEED_2_5;
+	case 2:
+		return NVKM_PCIE_SPEED_5_0;
+	case 3:
+		return NVKM_PCIE_SPEED_8_0;
+	}
+	return -1;
+}
+
+static enum nvkm_pcie_speed
+gk104_get_pcie_max_speed(struct nvkm_pci *pci)
+{
+	u32 max_speed = gk104_pci2_rd32(pci, 0x1c0) & 0x300000;
+	switch (max_speed) {
+	case 0x000000:
+		return NVKM_PCIE_SPEED_8_0;
+	case 0x100000:
+		return NVKM_PCIE_SPEED_5_0;
+	case 0x200000:
+		return NVKM_PCIE_SPEED_2_5;
+	}
+	return NVKM_PCIE_SPEED_2_5;
+}
+
+static void
+gk104_set_pcie_sta_speed(struct nvkm_pci *pci, enum nvkm_pcie_speed speed)
+{
+	u32 mask_value;
+	switch (speed) {
+	default:
+	case NVKM_PCIE_SPEED_2_5:
+		mask_value = 0x80000;
+		break;
+	case NVKM_PCIE_SPEED_5_0:
+		mask_value = 0x40000;
+		break;
+	case NVKM_PCIE_SPEED_8_0:
+		mask_value = 0x00000;
+		break;
+	}
+	gk104_pci2_mask(pci, 0x40, 0xc0000, mask_value);
+	gk104_pci2_mask(pci, 0x40, 0x1, 0x1);
+}
+
+static int
+gk104_pcie_speed_init(struct nvkm_pci * pci)
+{
+	if (!pci_is_pcie(pci->pdev))
+		return -ENODEV;
+
+	if (gf100_get_pcie_version(pci) > 1) {
+		enum nvkm_pcie_speed
+			lnkctl_speed = gk104_get_pcie_lnkctl_speed(pci),
+			max_speed = gk104_get_pcie_max_speed(pci),
+			cap_speed = gk104_get_pcie_cap_speed(pci);
+
+		if (cap_speed != max_speed) {
+			nvkm_debug(&pci->subdev, "adjusting cap speed to max
speed\n");
+			gk104_set_pcie_cap_speed(pci, max_speed);
+			cap_speed = gk104_get_pcie_cap_speed(pci);
+			if (cap_speed != max_speed)
+				nvkm_error(&pci->subdev, "couldn't adjust cap
speed\n");
+		}
+
+		if (lnkctl_speed != max_speed) {
+			nvkm_debug(&pci->subdev,
+				"adjusting link control speed to max speed\n");
+			gk104_set_pcie_lnkctl_speed(pci, max_speed);
+			lnkctl_speed = gk104_get_pcie_lnkctl_speed(pci);
+			if (lnkctl_speed != max_speed)
+				nvkm_error(&pci->subdev,
+					"couldn't adjust link control speed\n");
+		}
+	}
+	return 0;
+}
+
+static int
+gk104_pcie_speed_set(struct nvkm_pci *pci, enum nvkm_pcie_speed req_speed, u8
req_width)
+{
+	enum nvkm_pcie_speed
+		lnk_ctl_speed = gk104_get_pcie_lnkctl_speed(pci),
+		lnk_cap_speed = gk104_get_pcie_cap_speed(pci);
+
+	if (req_speed > lnk_cap_speed) {
+		req_speed = lnk_cap_speed;
+		nvkm_warn(&pci->subdev, "dropping requested PCIe speed due to
low"
+				" cap speed\n");
+	}
+
+	if (req_speed > lnk_ctl_speed) {
+		req_speed = lnk_ctl_speed;
+		nvkm_warn(&pci->subdev, "dropping requested PCIe speed due to
low"
+				" control speed\n");
+	}
+
+	gk104_set_pcie_sta_speed(pci, req_speed);
+	return 0;
+}
+
+
 static const struct nvkm_pci_func
 gk104_pci_func = {
 	.rd32 = nv40_pci_rd32,
@@ -30,10 +220,15 @@ gk104_pci_func = {
 	.wr32 = nv40_pci_wr32,
 	.msi_rearm = nv40_pci_msi_rearm,
 
+	.pcie_speed_init = gk104_pcie_speed_init,
+	.pcie_speed_set = gk104_pcie_speed_set,
+
+	.pcie_max_speed = gk104_get_pcie_max_speed,
 	.pcie_current_speed = g84_get_real_speed,
 
 	.set_pcie_version = gf100_set_pcie_version,
 	.get_pcie_version = gf100_get_pcie_version,
+	.get_pcie_version_supported = gk104_get_pcie_version_supported,
 };
 
 int
-- 
2.6.1

Karol Herbst

2015-Oct-12 20:27 UTC

head link

[Nouveau] [PATCH 7/9] bios/perf: parse the pci speed from the bios for tesla and newer cards

Signed-off-by: Karol Herbst <nouveau at karolherbst.de>
---
 drm/nouveau/include/nvkm/subdev/bios/perf.h |  2 ++
 drm/nouveau/nvkm/subdev/bios/perf.c         | 16 ++++++++++++++++
 2 files changed, 18 insertions(+)

diff --git a/drm/nouveau/include/nvkm/subdev/bios/perf.h
b/drm/nouveau/include/nvkm/subdev/bios/perf.h
index 7cc2bec..d3bd250 100644
--- a/drm/nouveau/include/nvkm/subdev/bios/perf.h
+++ b/drm/nouveau/include/nvkm/subdev/bios/perf.h
@@ -13,6 +13,8 @@ struct nvbios_perfE {
 	u32 vdec;
 	u32 disp;
 	u32 script;
+	u8  pcie_speed;
+	u8  pcie_width;
 };
 
 u16 nvbios_perf_entry(struct nvkm_bios *, int idx,
diff --git a/drm/nouveau/nvkm/subdev/bios/perf.c
b/drm/nouveau/nvkm/subdev/bios/perf.c
index aa7e33b..636bfb6 100644
--- a/drm/nouveau/nvkm/subdev/bios/perf.c
+++ b/drm/nouveau/nvkm/subdev/bios/perf.c
@@ -24,6 +24,7 @@
 #include <subdev/bios.h>
 #include <subdev/bios/bit.h>
 #include <subdev/bios/perf.h>
+#include <subdev/pci.h>
 
 u16
 nvbios_perf_table(struct nvkm_bios *bios, u8 *ver, u8 *hdr,
@@ -145,6 +146,21 @@ nvbios_perfEp(struct nvkm_bios *bios, int idx,
 		break;
 	case 0x40:
 		info->voltage  = nvbios_rd08(bios, perf + 0x02);
+		switch (nvbios_rd08(bios, perf + 0xb) & 0x3) {
+		case 0:
+			info->pcie_speed = NVKM_PCIE_SPEED_5_0;
+			break;
+		case 3:
+		case 1:
+			info->pcie_speed = NVKM_PCIE_SPEED_2_5;
+			break;
+		case 2:
+			info->pcie_speed = NVKM_PCIE_SPEED_8_0;
+			break;
+		default:
+			break;
+		}
+		info->pcie_width = 0xff;
 		break;
 	default:
 		return 0x0000;
-- 
2.6.1

Karol Herbst

2015-Oct-12 20:27 UTC

head link

[Nouveau] [PATCH 8/9] perf: add fields for pci speed and width and use it for the pstates

Signed-off-by: Karol Herbst <nouveau at karolherbst.de>
---
 drm/nouveau/include/nvkm/subdev/clk.h | 3 +++
 drm/nouveau/nvkm/subdev/clk/base.c    | 2 ++
 2 files changed, 5 insertions(+)

diff --git a/drm/nouveau/include/nvkm/subdev/clk.h
b/drm/nouveau/include/nvkm/subdev/clk.h
index 8708f0a..e9c4a81 100644
--- a/drm/nouveau/include/nvkm/subdev/clk.h
+++ b/drm/nouveau/include/nvkm/subdev/clk.h
@@ -2,6 +2,7 @@
 #define __NVKM_CLK_H__
 #include <core/subdev.h>
 #include <core/notify.h>
+#include <subdev/pci.h>
 struct nvbios_pll;
 struct nvkm_pll_vals;
 
@@ -59,6 +60,8 @@ struct nvkm_pstate {
 	struct nvkm_cstate base;
 	u8 pstate;
 	u8 fanspeed;
+	enum nvkm_pcie_speed pcie_speed;
+	u8 pcie_width;
 };
 
 struct nvkm_domain {
diff --git a/drm/nouveau/nvkm/subdev/clk/base.c
b/drm/nouveau/nvkm/subdev/clk/base.c
index b7d82a4..7ae4f26 100644
--- a/drm/nouveau/nvkm/subdev/clk/base.c
+++ b/drm/nouveau/nvkm/subdev/clk/base.c
@@ -330,6 +330,8 @@ nvkm_pstate_new(struct nvkm_clk *clk, int idx)
 
 	pstate->pstate = perfE.pstate;
 	pstate->fanspeed = perfE.fanspeed;
+	pstate->pcie_speed = perfE.pcie_speed;
+	pstate->pcie_width = perfE.pcie_width;
 	cstate->voltage = perfE.voltage;
 	cstate->domain[nv_clk_src_core] = perfE.core;
 	cstate->domain[nv_clk_src_shader] = perfE.shader;
-- 
2.6.1

Karol Herbst

2015-Oct-12 20:27 UTC

head link

[Nouveau] [PATCH 9/9] perf: change pcie speed on pstate change

Signed-off-by: Karol Herbst <nouveau at karolherbst.de>
---
 drm/nouveau/nvkm/subdev/clk/base.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drm/nouveau/nvkm/subdev/clk/base.c
b/drm/nouveau/nvkm/subdev/clk/base.c
index 7ae4f26..4e5122b 100644
--- a/drm/nouveau/nvkm/subdev/clk/base.c
+++ b/drm/nouveau/nvkm/subdev/clk/base.c
@@ -176,6 +176,7 @@ nvkm_pstate_prog(struct nvkm_clk *clk, int pstatei)
 {
 	struct nvkm_subdev *subdev = &clk->subdev;
 	struct nvkm_ram *ram = subdev->device->fb->ram;
+	struct nvkm_pci *pci = subdev->device->pci;
 	struct nvkm_pstate *pstate;
 	int ret, idx = 0;
 
@@ -187,6 +188,12 @@ nvkm_pstate_prog(struct nvkm_clk *clk, int pstatei)
 	nvkm_debug(subdev, "setting performance state %d\n", pstatei);
 	clk->pstate = pstatei;
 
+	if (pci) {
+		ret = nvkm_pci_set_pcie_link(pci, pstate->pcie_speed,
pstate->pcie_width);
+		if (ret < 0)
+			nvkm_error(subdev, "failed changing pcie speed with: %i\n", ret);
+	}
+
 	if (ram && ram->func->calc) {
 		int khz = pstate->base.domain[nv_clk_src_mem];
 		do {
-- 
2.6.1

Roy Spliet

2015-Oct-12 21:10 UTC

head link

[Nouveau] [PATCH 4/9] pci: implement pcie speed change for tesla

Hey Karol.

Thanks, great work. A few questions and nit-picks in-line, but I reckon 
on the technical side all is fine.
Cheers,

Roy

Op 12-10-15 om 21:27 schreef Karol Herbst:> Signed-off-by: Karol Herbst <nouveau at karolherbst.de>
> ---
>   drm/nouveau/nvkm/subdev/pci/g84.c   | 113
++++++++++++++++++++++++++++++++++++
>   drm/nouveau/nvkm/subdev/pci/g94.c   |  10 ++++
>   drm/nouveau/nvkm/subdev/pci/gf100.c |   5 ++
>   drm/nouveau/nvkm/subdev/pci/gf106.c |   5 ++
>   drm/nouveau/nvkm/subdev/pci/gk104.c |   2 +
>   drm/nouveau/nvkm/subdev/pci/priv.h  |   9 +++
>   6 files changed, 144 insertions(+)
>
> diff --git a/drm/nouveau/nvkm/subdev/pci/g84.c
b/drm/nouveau/nvkm/subdev/pci/g84.c
> index 3faa6bf..e53208e 100644
> --- a/drm/nouveau/nvkm/subdev/pci/g84.c
> +++ b/drm/nouveau/nvkm/subdev/pci/g84.c
> @@ -25,6 +25,109 @@
>   
>   #include <core/pci.h>
>   
> +u8Is there a particular reason for making this u8 over u32 or unsigned
int?> +g84_get_pcie_version_supported(struct nvkm_pci *pci)
> +{
> +	u32 chipset = pci->subdev.device->chipset, reg_v;
> +
> +	/* these cards report wrong information about what they support */
> +	if (chipset == 0x84 || chipset == 0x86)
> +		return 1;
> +
> +	reg_v = nvkm_pci_rd32(pci, 0x460) & 0x200;
> +	if (reg_v == 0x200)
> +		return 2;
> +	return 1;
> +}
> +
> +void
> +g84_set_pcie_version(struct nvkm_pci *pci, u8 ver)
> +{
> +	struct nvkm_device *device = pci->subdev.device;
> +
> +	if (ver > 1)
> +		ver = 1;
> +	else
> +		ver = 0;
> +
> +	nvkm_mask(device, 0x00154c, 0x1, ver);The above five lines can also be written as the following one-liner:
nvkm_mask(device, 0x00154c, 0x1, (ver > 1));
or alternatively
nvkm_mask(device, 0x00154c, 0x1, (ver >= 2 ? 0x1 : 0x0));

I'd personally find that easier to read. However, I accept this is also 
just a bit of bike-shedding..> +}
> +
> +u8
> +g84_get_pcie_version(struct nvkm_pci *pci)
> +{
> +	struct nvkm_device *device = pci->subdev.device;
> +	return (nvkm_rd32(device, 0x00154c) & 0x1) + 1;
> +}
> +
> +static void
> +g84_set_pcie_cap_speed(struct nvkm_pci *pci, bool full_speed)
> +{
> +	struct nvkm_device *device = pci->subdev.device;
> +	nvkm_mask(device, 0x00154c, 0x80, full_speed ? 0x80 : 0x0);
> +}
> +
> +enum nvkm_pcie_speed
> +g84_get_real_speed(struct nvkm_pci *pci)
> +{
> +	u32 reg_v = nvkm_pci_rd32(pci, 0x88) & 0x30000;
> +	switch (reg_v) {
> +		case 0x30000:
> +			return NVKM_PCIE_SPEED_8_0;
> +		case 0x20000:
> +			return NVKM_PCIE_SPEED_5_0;
> +		case 0x10000:
> +		default:
> +			return NVKM_PCIE_SPEED_2_5;
> +	}
> +}
> +
> +enum nvkm_pcie_speed
> +g84_get_pcie_max_speed(struct nvkm_pci *pci)
> +{
> +	u32 reg_v = nvkm_pci_rd32(pci, 0x460) & 0x3300;
> +	if (reg_v == 0x2200)
> +		return NVKM_PCIE_SPEED_5_0;
> +	return NVKM_PCIE_SPEED_2_5;
> +}
> +
> +void
> +g84_set_pcie_sta_speed(struct nvkm_pci *pci, enum nvkm_pcie_speed speed)
> +{
> +	u32 mask_value;
> +
> +	if (speed == NVKM_PCIE_SPEED_5_0)
> +		mask_value = 0x20;
> +	else
> +		mask_value = 0x10;
> +
> +	nvkm_pci_mask(pci, 0x460, 0x30, mask_value);
> +	nvkm_pci_mask(pci, 0x460, 0x1, 0x1);
> +}
> +
> +int
> +g84_pcie_speed_init(struct nvkm_pci *pci)
> +{
> +	if (g84_get_real_speed(pci) == NVKM_PCIE_SPEED_2_5)
> +		g84_set_pcie_cap_speed(pci, false);
> +	else
> +		g84_set_pcie_cap_speed(pci, true);
> +	return 0;
> +}
> +
> +int
> +g84_pcie_speed_set(struct nvkm_pci *pci, enum nvkm_pcie_speed req_speed,
u8 req_width)
> +{
> +	if (req_speed == NVKM_PCIE_SPEED_5_0)
> +		g84_set_pcie_cap_speed(pci, true);
> +	else
> +		g84_set_pcie_cap_speed(pci, false);
> +
> +	g84_set_pcie_sta_speed(pci, req_speed);
> +
> +	return 0;
> +}
> +
>   void
>   g84_pci_init(struct nvkm_pci *pci)
>   {
> @@ -55,6 +158,16 @@ g84_pci_func = {
>   	.wr08 = nv40_pci_wr08,
>   	.wr32 = nv40_pci_wr32,
>   	.msi_rearm = nv46_pci_msi_rearm,
> +
> +	.pcie_speed_init = g84_pcie_speed_init,
> +	.pcie_speed_set = g84_pcie_speed_set,
> +
> +	.pcie_max_speed = g84_get_pcie_max_speed,
> +	.pcie_current_speed = g84_get_real_speed,I'd aim for consistency here, by naming the function 
g84_get_current_speed(), or
if you like it short g84_get_cur_speed(). Either way, try to keep names 
consistent and descriptive.

As far as I can tell the same goes for gk104 and gf106.> +
> +	.set_pcie_version = g84_set_pcie_version,
> +	.get_pcie_version = g84_get_pcie_version,
> +	.get_pcie_version_supported = g84_get_pcie_version_supported,
>   };
>   
>   int
> diff --git a/drm/nouveau/nvkm/subdev/pci/g94.c
b/drm/nouveau/nvkm/subdev/pci/g94.c
> index cd311ee..1431041 100644
> --- a/drm/nouveau/nvkm/subdev/pci/g94.c
> +++ b/drm/nouveau/nvkm/subdev/pci/g94.c
> @@ -30,6 +30,16 @@ g94_pci_func = {
>   	.wr08 = nv40_pci_wr08,
>   	.wr32 = nv40_pci_wr32,
>   	.msi_rearm = nv40_pci_msi_rearm,
> +
> +	.pcie_speed_init = g84_pcie_speed_init,
> +	.pcie_speed_set = g84_pcie_speed_set,
> +
> +	.pcie_max_speed = g84_get_pcie_max_speed,
> +	.pcie_current_speed = g84_get_real_speed,
> +
> +	.set_pcie_version = g84_set_pcie_version,
> +	.get_pcie_version = g84_get_pcie_version,
> +	.get_pcie_version_supported = g84_get_pcie_version_supported,
>   };
>   
>   int
> diff --git a/drm/nouveau/nvkm/subdev/pci/gf100.c
b/drm/nouveau/nvkm/subdev/pci/gf100.c
> index 25e1ae7..bd88dd5 100644
> --- a/drm/nouveau/nvkm/subdev/pci/gf100.c
> +++ b/drm/nouveau/nvkm/subdev/pci/gf100.c
> @@ -36,6 +36,11 @@ gf100_pci_func = {
>   	.wr08 = nv40_pci_wr08,
>   	.wr32 = nv40_pci_wr32,
>   	.msi_rearm = gf100_pci_msi_rearm,
> +
> +	.pcie_max_speed = g84_get_pcie_max_speed,
> +	.pcie_current_speed = g84_get_real_speed,
> +
> +	.get_pcie_version_supported = g84_get_pcie_version_supported,
>   };
>   
>   int
> diff --git a/drm/nouveau/nvkm/subdev/pci/gf106.c
b/drm/nouveau/nvkm/subdev/pci/gf106.c
> index a3d451e..e2223b9 100644
> --- a/drm/nouveau/nvkm/subdev/pci/gf106.c
> +++ b/drm/nouveau/nvkm/subdev/pci/gf106.c
> @@ -29,6 +29,11 @@ gf106_pci_func = {
>   	.wr08 = nv40_pci_wr08,
>   	.wr32 = nv40_pci_wr32,
>   	.msi_rearm = nv40_pci_msi_rearm,
> +
> +	.pcie_max_speed = g84_get_pcie_max_speed,
> +	.pcie_current_speed = g84_get_real_speed,
> +
> +	.get_pcie_version_supported = g84_get_pcie_version_supported,
>   };
>   
>   int
> diff --git a/drm/nouveau/nvkm/subdev/pci/gk104.c
b/drm/nouveau/nvkm/subdev/pci/gk104.c
> index 95ecc51..7b6bb5b 100644
> --- a/drm/nouveau/nvkm/subdev/pci/gk104.c
> +++ b/drm/nouveau/nvkm/subdev/pci/gk104.c
> @@ -29,6 +29,8 @@ gk104_pci_func = {
>   	.wr08 = nv40_pci_wr08,
>   	.wr32 = nv40_pci_wr32,
>   	.msi_rearm = nv40_pci_msi_rearm,
> +
> +	.pcie_current_speed = g84_get_real_speed,
>   };
>   
>   int
> diff --git a/drm/nouveau/nvkm/subdev/pci/priv.h
b/drm/nouveau/nvkm/subdev/pci/priv.h
> index 11c266f..9c62164 100644
> --- a/drm/nouveau/nvkm/subdev/pci/priv.h
> +++ b/drm/nouveau/nvkm/subdev/pci/priv.h
> @@ -33,5 +33,14 @@ void nv46_pci_msi_rearm(struct nvkm_pci *);
>   
>   void g84_pci_init(struct nvkm_pci *pci);
>   
> +void g84_set_pcie_version(struct nvkm_pci *, u8);
> +u8 g84_get_pcie_version(struct nvkm_pci *);
> +u8 g84_get_pcie_version_supported(struct nvkm_pci *);
> +void g84_set_pcie_sta_speed(struct nvkm_pci *, enum nvkm_pcie_speed);
> +enum nvkm_pcie_speed g84_get_real_speed(struct nvkm_pci *);
> +enum nvkm_pcie_speed g84_get_pcie_max_speed(struct nvkm_pci *);
> +int g84_pcie_speed_init(struct nvkm_pci *);
> +int g84_pcie_speed_set(struct nvkm_pci *, enum nvkm_pcie_speed, u8);
> +
>   int nvkm_pci_pcie_init(struct nvkm_pci *pci);
>   #endif

Roy Spliet

2015-Oct-12 21:13 UTC

head link

[Nouveau] [PATCH 3/9] pci: implement generic code for PCIe speed change

Some more minor nitting!

Op 12-10-15 om 21:27 schreef Karol Herbst:> Signed-off-by: Karol Herbst <nouveau at karolherbst.de>
> ---
>   drm/nouveau/include/nvkm/subdev/pci.h |  12 +++
>   drm/nouveau/nvkm/subdev/pci/Kbuild    |   1 +
>   drm/nouveau/nvkm/subdev/pci/base.c    |   5 ++
>   drm/nouveau/nvkm/subdev/pci/pcie.c    | 159
++++++++++++++++++++++++++++++++++
>   drm/nouveau/nvkm/subdev/pci/priv.h    |  12 +++
>   5 files changed, 189 insertions(+)
>   create mode 100644 drm/nouveau/nvkm/subdev/pci/pcie.c
>
> diff --git a/drm/nouveau/include/nvkm/subdev/pci.h
b/drm/nouveau/include/nvkm/subdev/pci.h
> index 17fe7b7..e195736 100644
> --- a/drm/nouveau/include/nvkm/subdev/pci.h
> +++ b/drm/nouveau/include/nvkm/subdev/pci.h
> @@ -2,6 +2,12 @@
>   #define __NVKM_PCI_H__
>   #include <core/subdev.h>
>   
> +enum nvkm_pcie_speed {
> +	NVKM_PCIE_SPEED_2_5,
> +	NVKM_PCIE_SPEED_5_0,
> +	NVKM_PCIE_SPEED_8_0,
> +};
> +
>   struct nvkm_pci {
>   	const struct nvkm_pci_func *func;
>   	struct nvkm_subdev subdev;
> @@ -18,6 +24,11 @@ struct nvkm_pci {
>   		bool acquired;
>   	} agp;
>   
> +	struct {
> +		enum nvkm_pcie_speed last_speed;
> +		u8 last_width;
> +	} pcie;
> +
>   	bool msi;
>   };
>   
> @@ -26,6 +37,7 @@ void nvkm_pci_wr08(struct nvkm_pci *, u16 addr, u8 data);
>   void nvkm_pci_wr32(struct nvkm_pci *, u16 addr, u32 data);
>   u32 nvkm_pci_mask(struct nvkm_pci *, u16 addr, u32 mask, u32 value);
>   void nvkm_pci_rom_shadow(struct nvkm_pci *, bool shadow);
> +int nvkm_pci_set_pcie_link(struct nvkm_pci *, enum nvkm_pcie_speed, u8
width);
>   
>   int nv04_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
>   int nv40_pci_new(struct nvkm_device *, int, struct nvkm_pci **);
> diff --git a/drm/nouveau/nvkm/subdev/pci/Kbuild
b/drm/nouveau/nvkm/subdev/pci/Kbuild
> index 724afd4..3c2519f 100644
> --- a/drm/nouveau/nvkm/subdev/pci/Kbuild
> +++ b/drm/nouveau/nvkm/subdev/pci/Kbuild
> @@ -1,5 +1,6 @@
>   nvkm-y += nvkm/subdev/pci/agp.o
>   nvkm-y += nvkm/subdev/pci/base.o
> +nvkm-y += nvkm/subdev/pci/pcie.o
>   nvkm-y += nvkm/subdev/pci/nv04.o
>   nvkm-y += nvkm/subdev/pci/nv40.o
>   nvkm-y += nvkm/subdev/pci/nv46.o
> diff --git a/drm/nouveau/nvkm/subdev/pci/base.c
b/drm/nouveau/nvkm/subdev/pci/base.c
> index d671dcf..3895ab2 100644
> --- a/drm/nouveau/nvkm/subdev/pci/base.c
> +++ b/drm/nouveau/nvkm/subdev/pci/base.c
> @@ -117,6 +117,9 @@ nvkm_pci_init(struct nvkm_subdev *subdev)
>   		ret = nvkm_agp_init(pci);
>   		if (ret)
>   			return ret;
> +	} else {
> +		if (pci_is_pcie(pci->pdev))
> +			nvkm_pci_pcie_init(pci);
>   	}
>   
>   	if (pci->func->init)
> @@ -160,6 +163,8 @@ nvkm_pci_new_(const struct nvkm_pci_func *func, struct
nvkm_device *device,
>   	pci->func = func;
>   	pci->pdev = device->func->pci(device)->pdev;
>   	pci->irq = -1;
> +	pci->pcie.last_speed = -1;
> +	pci->pcie.last_width = -1;
>   
>   	if (device->type == NVKM_DEVICE_AGP)
>   		nvkm_agp_ctor(pci);
> diff --git a/drm/nouveau/nvkm/subdev/pci/pcie.c
b/drm/nouveau/nvkm/subdev/pci/pcie.c
> new file mode 100644
> index 0000000..05e9c55
> --- /dev/null
> +++ b/drm/nouveau/nvkm/subdev/pci/pcie.c
> @@ -0,0 +1,159 @@
> +/*
> + * Copyright 2015 Karol Herbst
> + *
> + * Permission is hereby granted, free of charge, to any person obtaining a
> + * copy of this software and associated documentation files (the
"Software"),
> + * to deal in the Software without restriction, including without
limitation
> + * the rights to use, copy, modify, merge, publish, distribute,
sublicense,
> + * and/or sell copies of the Software, and to permit persons to whom the
> + * Software is furnished to do so, subject to the following conditions:
> + *
> + * The above copyright notice and this permission notice shall be included
in
> + * all copies or substantial portions of the Software.
> + *
> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY
KIND, EXPRESS OR
> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
MERCHANTABILITY,
> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT
SHALL
> + * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES
OR
> + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
> + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
> + * OTHER DEALINGS IN THE SOFTWARE.
> + *
> + * Authors: Karol Herbst <git at karolherbst.de>
> + */
> +#include "priv.h"
> +
> +static char *pcie_speed_strings[] = {
> +	"2.5GT/s",
> +	"5.0GT/s",
> +	"8.0GT/s",
> +};
> +
> +static enum nvkm_pcie_speed
> +pci_bus_speed_to_nvkm_pcie_speed(enum pci_bus_speed speed)
> +{
> +	switch (speed) {
> +	case PCIE_SPEED_2_5GT:
> +		return NVKM_PCIE_SPEED_2_5;
> +	case PCIE_SPEED_5_0GT:
> +		return NVKM_PCIE_SPEED_5_0;
> +	case PCIE_SPEED_8_0GT:
> +		return NVKM_PCIE_SPEED_8_0;
> +	default:
> +		if (speed == 0x17) // 0x16 is 8_0, assume 0x17 will be 16_0 for nowPlease stick to C-style /* blah */ comments. This particular could 
warrant an "XXX" label to indicate it's a
todo.> +			return NVKM_PCIE_SPEED_8_0;
> +		return -1;
> +	}
> +}
> +
> +static s8
> +nvkm_pci_get_pcie_version(struct nvkm_pci *pci)
> +{
> +	if (!pci_is_pcie(pci->pdev))
> +		return -ENODEV;
> +
> +	if (!pci->func->get_pcie_version)
> +		return -ENOSYS;
> +
> +	return pci->func->get_pcie_version(pci);
> +}
> +
> +static s8
> +nvkm_pci_raise_pcie_version(struct nvkm_pci *pci)
> +{
> +	int ret, supported;
> +
> +	if (!pci_is_pcie(pci->pdev))
> +		return -ENODEV;
> +
> +	if (!pci->func->set_pcie_version ||
!pci->func->get_pcie_version_supported)
> +		return -ENOSYS;
> +
> +	ret = nvkm_pci_get_pcie_version(pci);
> +	supported = pci->func->get_pcie_version_supported(pci);
> +	if (ret == 1 && ret < supported) {
> +		nvkm_debug(&pci->subdev, "raising version\n");
> +		pci->func->set_pcie_version(pci, supported);
> +		ret = nvkm_pci_get_pcie_version(pci);
> +	}
> +	return ret >= supported ? ret : -EINVAL;
> +}
> +
> +int
> +nvkm_pci_pcie_init(struct nvkm_pci *pci)
> +{
> +	struct nvkm_subdev *subdev = &pci->subdev;
> +	int ret;
> +
> +	if (!pci_is_pcie(pci->pdev))
> +		return -ENODEV;
> +
> +	// raise pcie version first
Ditto.> +	ret = nvkm_pci_raise_pcie_version(pci);
> +	if (ret <= 0)
> +		nvkm_error(subdev, "couldn't raise version: %i\n", ret);
> +
> +	if (pci->func->pcie_speed_init)
> +		pci->func->pcie_speed_init(pci);
> +
> +	nvkm_info(subdev, "pcie version: %i\n",
nvkm_pci_get_pcie_version(pci));
> +	if (pci->func->pcie_max_speed)
> +		nvkm_info(subdev, "pcie max speed: %s\n",
pcie_speed_strings[pci->func->pcie_max_speed(pci)]);
> +
> +	if (pci->pcie.last_speed != -1)
> +		nvkm_pci_set_pcie_link(pci, pci->pcie.last_speed,
pci->pcie.last_width);
> +
> +	return 0;
> +}
> +
> +int
> +nvkm_pci_set_pcie_link(struct nvkm_pci * pci, enum nvkm_pcie_speed
req_speed, u8 req_width)
> +{
> +	struct nvkm_subdev *subdev = &pci->subdev;
> +	enum nvkm_pcie_speed sys_cur_speed, sys_max_speed;
> +	struct pci_bus *pbus = pci->pdev->bus;
> +	int ret;
> +
> +	if (!pci_is_pcie(pci->pdev))
> +		return -ENODEV;
> +
> +	if (!pci->func->pcie_speed_set ||
!pci->func->get_pcie_version || !pci->func->pcie_max_speed ||
!pci->func->pcie_current_speed)
> +		return -ENOSYS;
> +
> +	nvkm_debug(subdev, "pcie speed %s requested\n",
pcie_speed_strings[req_speed]);
> +
> +	if (pci->func->get_pcie_version(pci) < 2) {
> +		nvkm_error(subdev, "can't change link speed, "
> +				"because current version too low\n");
> +		return -ENODEV;
> +	}
> +
> +	sys_cur_speed = pci->func->pcie_current_speed(pci);
> +	sys_max_speed =
min(pci_bus_speed_to_nvkm_pcie_speed(pbus->max_bus_speed),
pci->func->pcie_max_speed(pci));
> +
> +	nvkm_debug(subdev, "bus current speed: %s max speed: %s\n",
> +			pcie_speed_strings[sys_cur_speed], pcie_speed_strings[sys_max_speed]);
> +
> +	if (req_speed > sys_max_speed) {
> +		req_speed = sys_max_speed;
> +		nvkm_warn(subdev, "bus or card not fast enough, dropping "
> +				"requested speed to %s", pcie_speed_strings[req_speed]);
> +	}
> +
> +	pci->pcie.last_speed = req_speed;
> +	pci->pcie.last_width = req_width;
> +
> +	if (req_speed == sys_cur_speed) {
> +		nvkm_debug(subdev, "requested speed matches current speed
already\n");
> +		return req_speed;
> +	}
> +
> +	nvkm_debug(subdev, "set link to speed: %s width: x%i\n",
> +			pcie_speed_strings[req_speed], req_width);
> +	ret = pci->func->pcie_speed_set(pci, req_speed, req_width);
> +
> +	if (ret < 0)
> +		nvkm_error(subdev, "setting link failed with ret: %i\n", ret);
> +
> +	return ret;
> +}
> diff --git a/drm/nouveau/nvkm/subdev/pci/priv.h
b/drm/nouveau/nvkm/subdev/pci/priv.h
> index cf46d38..11c266f 100644
> --- a/drm/nouveau/nvkm/subdev/pci/priv.h
> +++ b/drm/nouveau/nvkm/subdev/pci/priv.h
> @@ -12,6 +12,16 @@ struct nvkm_pci_func {
>   	void (*wr08)(struct nvkm_pci *, u16 addr, u8 data);
>   	void (*wr32)(struct nvkm_pci *, u16 addr, u32 data);
>   	void (*msi_rearm)(struct nvkm_pci *);
> +
> +	int (*pcie_speed_init)(struct nvkm_pci *);
> +	int (*pcie_speed_set)(struct nvkm_pci *, enum nvkm_pcie_speed, u8);
> +
> +	enum nvkm_pcie_speed (*pcie_max_speed)(struct nvkm_pci *);
> +	enum nvkm_pcie_speed (*pcie_current_speed)(struct nvkm_pci *);
> +
> +	void (*set_pcie_version)(struct nvkm_pci *, u8);
> +	u8 (*get_pcie_version)(struct nvkm_pci *);
> +	u8 (*get_pcie_version_supported)(struct nvkm_pci *);
>   };
>   
>   u32 nv40_pci_rd32(struct nvkm_pci *, u16);
> @@ -22,4 +32,6 @@ void nv40_pci_msi_rearm(struct nvkm_pci *);
>   void nv46_pci_msi_rearm(struct nvkm_pci *);
>   
>   void g84_pci_init(struct nvkm_pci *pci);
> +
> +int nvkm_pci_pcie_init(struct nvkm_pci *pci);
>   #endif

Roy Spliet

2015-Oct-12 21:16 UTC

head link

[Nouveau] [PATCH 9/9] perf: change pcie speed on pstate change

Comment in-line.
Cheers,

Roy

Op 12-10-15 om 21:27 schreef Karol Herbst:> Signed-off-by: Karol Herbst <nouveau at karolherbst.de>
> ---
>   drm/nouveau/nvkm/subdev/clk/base.c | 7 +++++++
>   1 file changed, 7 insertions(+)
>
> diff --git a/drm/nouveau/nvkm/subdev/clk/base.c
b/drm/nouveau/nvkm/subdev/clk/base.c
> index 7ae4f26..4e5122b 100644
> --- a/drm/nouveau/nvkm/subdev/clk/base.c
> +++ b/drm/nouveau/nvkm/subdev/clk/base.c
> @@ -176,6 +176,7 @@ nvkm_pstate_prog(struct nvkm_clk *clk, int pstatei)
>   {
>   	struct nvkm_subdev *subdev = &clk->subdev;
>   	struct nvkm_ram *ram = subdev->device->fb->ram;
> +	struct nvkm_pci *pci = subdev->device->pci;
>   	struct nvkm_pstate *pstate;
>   	int ret, idx = 0;
>   
> @@ -187,6 +188,12 @@ nvkm_pstate_prog(struct nvkm_clk *clk, int pstatei)
>   	nvkm_debug(subdev, "setting performance state %d\n", pstatei);
>   	clk->pstate = pstatei;
>   
> +	if (pci) {
> +		ret = nvkm_pci_set_pcie_link(pci, pstate->pcie_speed,
pstate->pcie_width);
> +		if (ret < 0)
> +			nvkm_error(subdev, "failed changing pcie speed with: %i\n",
ret);Is this an error? It makes it sound like a serious issue, even though 
this is expected behaviour eg. when the motherboard doesn't support the 
desired PCIe speed. Maybe a "debug" message is more appropriate
here.> +	}
> +
>   	if (ram && ram->func->calc) {
>   		int khz = pstate->base.domain[nv_clk_src_mem];
>   		do {

Nouveau - Oct 2015 - [PATCH 4/9] pci: implement pcie speed change for tesla

[Nouveau] [PATCH 0/9] PCIe speed changes

[Nouveau] [PATCH 1/9] pci: add gk104 variant

[Nouveau] [PATCH 2/9] pci: add gf106 variant

[Nouveau] [PATCH 3/9] pci: implement generic code for PCIe speed change

[Nouveau] [PATCH 4/9] pci: implement pcie speed change for tesla

[Nouveau] [PATCH 5/9] pci: implement pcie speed change on Fermi

[Nouveau] [PATCH 6/9] pci: implement PCIe speed change for kepler+

[Nouveau] [PATCH 7/9] bios/perf: parse the pci speed from the bios for tesla and newer cards

[Nouveau] [PATCH 8/9] perf: add fields for pci speed and width and use it for the pstates

[Nouveau] [PATCH 9/9] perf: change pcie speed on pstate change

[Nouveau] [PATCH 4/9] pci: implement pcie speed change for tesla

[Nouveau] [PATCH 3/9] pci: implement generic code for PCIe speed change

[Nouveau] [PATCH 9/9] perf: change pcie speed on pstate change