Ilia Mirkin
2015-May-09 07:31 UTC
[Nouveau] [PATCH] nv50/ir: only enable mul saturate on G200+
Commit 44673512a84 enabled support for saturating fmul. However
experimentally this does not seem to work on the older chips. Restrict
the feature to G200 (NVA0) and later.
Reported-by: Pierre Moreau <pierre.morrow at free.fr>
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90350
Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu>
Cc: mesa-stable at lists.freedesktop.org
---
src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp | 5 ++++-
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp
b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp
index 70180eb..ca545a6 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp
@@ -84,7 +84,7 @@ static const struct opProperties _initProps[] //
neg abs not sat c[] s[], a[], imm
{ OP_ADD, 0x3, 0x0, 0x0, 0x8, 0x2, 0x1, 0x1, 0x2 },
{ OP_SUB, 0x3, 0x0, 0x0, 0x8, 0x2, 0x1, 0x1, 0x2 },
- { OP_MUL, 0x3, 0x0, 0x0, 0x8, 0x2, 0x1, 0x1, 0x2 },
+ { OP_MUL, 0x3, 0x0, 0x0, 0x0, 0x2, 0x1, 0x1, 0x2 },
{ OP_MAX, 0x3, 0x3, 0x0, 0x0, 0x2, 0x1, 0x1, 0x0 },
{ OP_MIN, 0x3, 0x3, 0x0, 0x0, 0x2, 0x1, 0x1, 0x0 },
{ OP_MAD, 0x7, 0x0, 0x0, 0x8, 0x6, 0x1, 0x1, 0x0 }, // special constraint
@@ -188,6 +188,9 @@ void TargetNV50::initOpInfo()
if (prop->mSat & 8)
opInfo[prop->op].dstMods = NV50_IR_MOD_SAT;
}
+
+ if (chipset >= 0xa0)
+ opInfo[OP_MUL].dstMods = NV50_IR_MOD_SAT;
}
unsigned int
--
2.3.6
Pierre Moreau
2015-May-09 07:41 UTC
[Nouveau] [PATCH] nv50/ir: only enable mul saturate on G200+
Tested-by: Pierre Moreau <pierre.morrow at free.fr> ----- Mail original -----> Commit 44673512a84 enabled support for saturating fmul. However > experimentally this does not seem to work on the older chips. > Restrict > the feature to G200 (NVA0) and later. > > Reported-by: Pierre Moreau <pierre.morrow at free.fr> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90350 > Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> > Cc: mesa-stable at lists.freedesktop.org > --- > src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp | 5 > ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git > a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp > b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp > index 70180eb..ca545a6 100644 > --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp > +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp > @@ -84,7 +84,7 @@ static const struct opProperties _initProps[] > // neg abs not sat c[] s[], a[], imm > { OP_ADD, 0x3, 0x0, 0x0, 0x8, 0x2, 0x1, 0x1, 0x2 }, > { OP_SUB, 0x3, 0x0, 0x0, 0x8, 0x2, 0x1, 0x1, 0x2 }, > - { OP_MUL, 0x3, 0x0, 0x0, 0x8, 0x2, 0x1, 0x1, 0x2 }, > + { OP_MUL, 0x3, 0x0, 0x0, 0x0, 0x2, 0x1, 0x1, 0x2 }, > { OP_MAX, 0x3, 0x3, 0x0, 0x0, 0x2, 0x1, 0x1, 0x0 }, > { OP_MIN, 0x3, 0x3, 0x0, 0x0, 0x2, 0x1, 0x1, 0x0 }, > { OP_MAD, 0x7, 0x0, 0x0, 0x8, 0x6, 0x1, 0x1, 0x0 }, // special > constraint > @@ -188,6 +188,9 @@ void TargetNV50::initOpInfo() > if (prop->mSat & 8) > opInfo[prop->op].dstMods = NV50_IR_MOD_SAT; > } > + > + if (chipset >= 0xa0) > + opInfo[OP_MUL].dstMods = NV50_IR_MOD_SAT; > } > > unsigned int > -- > 2.3.6 > > _______________________________________________ > Nouveau mailing list > Nouveau at lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/nouveau >
Tobias Klausmann
2015-May-09 15:12 UTC
[Nouveau] [PATCH] nv50/ir: only enable mul saturate on G200+
Reviewed-by: Tobias Klausmann <tobias.johannes.klausmann at mni.thm.de> On 09.05.2015 09:31, Ilia Mirkin wrote:> Commit 44673512a84 enabled support for saturating fmul. However > experimentally this does not seem to work on the older chips. Restrict > the feature to G200 (NVA0) and later. > > Reported-by: Pierre Moreau <pierre.morrow at free.fr> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90350 > Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu> > Cc: mesa-stable at lists.freedesktop.org > --- > src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp | 5 ++++- > 1 file changed, 4 insertions(+), 1 deletion(-) > > diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp > index 70180eb..ca545a6 100644 > --- a/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp > +++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_target_nv50.cpp > @@ -84,7 +84,7 @@ static const struct opProperties _initProps[] > // neg abs not sat c[] s[], a[], imm > { OP_ADD, 0x3, 0x0, 0x0, 0x8, 0x2, 0x1, 0x1, 0x2 }, > { OP_SUB, 0x3, 0x0, 0x0, 0x8, 0x2, 0x1, 0x1, 0x2 }, > - { OP_MUL, 0x3, 0x0, 0x0, 0x8, 0x2, 0x1, 0x1, 0x2 }, > + { OP_MUL, 0x3, 0x0, 0x0, 0x0, 0x2, 0x1, 0x1, 0x2 }, > { OP_MAX, 0x3, 0x3, 0x0, 0x0, 0x2, 0x1, 0x1, 0x0 }, > { OP_MIN, 0x3, 0x3, 0x0, 0x0, 0x2, 0x1, 0x1, 0x0 }, > { OP_MAD, 0x7, 0x0, 0x0, 0x8, 0x6, 0x1, 0x1, 0x0 }, // special constraint > @@ -188,6 +188,9 @@ void TargetNV50::initOpInfo() > if (prop->mSat & 8) > opInfo[prop->op].dstMods = NV50_IR_MOD_SAT; > } > + > + if (chipset >= 0xa0) > + opInfo[OP_MUL].dstMods = NV50_IR_MOD_SAT; > } > > unsigned int