Nouveau - Sep 2014 - [PATCH 1/2] drm/nouveau/disp/nv50: Add PFB writes

This fix a GPU lockup on 9400M (NVAC) when using acceleration, see #27501.

Signed-off-by: Pierre Moreau <pierre.morrow at free.fr>
---
 drivers/gpu/drm/nouveau/core/engine/disp/nv50.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c
b/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c
index a7efbff..e425604 100644
--- a/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c
+++ b/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c
@@ -1137,6 +1137,15 @@ nv50_disp_base_init(struct nouveau_object *object)
 	if (ret)
 		return ret;
 
+	if (nv_device(priv)->chipset == 0xac) {
+		nv_mask(priv, 0x100c18, 0x00000000, 0x000027ff);
+		nv_mask(priv, 0x100c14, 0x00000000, 0x00000001);
+		nv_mask(priv, 0x100c1c, 0x00000000, 0x000027fc);
+		nv_mask(priv, 0x100c14, 0x00000000, 0x00000002);
+		nv_mask(priv, 0x100c24, 0x00000002, 0x000027fd);
+		nv_mask(priv, 0x100c14, 0x00000000, 0x00010000);
+	}
+
 	/* The below segments of code copying values from one register to
 	 * another appear to inform EVO of the display capabilities or
 	 * something similar.  NFI what the 0x614004 caps are for..
-- 
2.1.0

noaccel option now defaults to null which has no effect, it can still equal 1,
which disables acceleration for all cards, or be a pci address and disable
acceleration for that card only

Signed-off-by: Pierre Moreau <pierre.morrow at free.fr>
---
 drivers/gpu/drm/nouveau/nouveau_drm.c | 16 +++++++++++-----
 1 file changed, 11 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/nouveau/nouveau_drm.c
b/drivers/gpu/drm/nouveau/nouveau_drm.c
index 244d78f..04bd8f1 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drm.c
+++ b/drivers/gpu/drm/nouveau/nouveau_drm.c
@@ -61,9 +61,10 @@ MODULE_PARM_DESC(debug, "debug string to pass to driver
core");
 static char *nouveau_debug;
 module_param_named(debug, nouveau_debug, charp, 0400);
 
-MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
-static int nouveau_noaccel = 0;
-module_param_named(noaccel, nouveau_noaccel, int, 0400);
+MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration for all
cards,"
+		          "or only for the card given its pci bus name");
+static char *nouveau_noaccel;
+module_param_named(noaccel, nouveau_noaccel, charp, 0400);
 
 MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
 		          "0 = disabled, 1 = enabled, 2 = headless)");
@@ -149,8 +150,13 @@ nouveau_accel_init(struct nouveau_drm *drm)
 	u32 sclass[16];
 	int ret, i;
 
-	if (nouveau_noaccel)
+	if (nouveau_noaccel != NULL &&
+			(!strcmp(nouveau_noaccel, "1") ||
+			 !strcmp(nouveau_noaccel, nvkm_device(device)->name)))
+	{
+		NV_WARN(drm, "Acceleration disabled for card on bus %s\n",
nvkm_device(device)->name);
 		return;
+	}
 
 	/* initialise synchronisation routines */
 	/*XXX: this is crap, but the fence/channel stuff is a little
@@ -1039,7 +1045,7 @@ static void nouveau_display_options(void)
 	DRM_DEBUG_DRIVER("... nofbaccel    : %d\n", nouveau_nofbaccel);
 	DRM_DEBUG_DRIVER("... config       : %s\n", nouveau_config);
 	DRM_DEBUG_DRIVER("... debug        : %s\n", nouveau_debug);
-	DRM_DEBUG_DRIVER("... noaccel      : %d\n", nouveau_noaccel);
+	DRM_DEBUG_DRIVER("... noaccel      : %s\n", nouveau_noaccel);
 	DRM_DEBUG_DRIVER("... modeset      : %d\n", nouveau_modeset);
 	DRM_DEBUG_DRIVER("... runpm        : %d\n", nouveau_runtime_pm);
 	DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
-- 
2.1.0

NACK as far as I'm concerned, PFB initialisation belongs in 
core/subdev/fb. Also, is this required for NVAA as well?

Op 25-09-14 om 11:36 schreef Pierre Moreau:
> This fix a GPU lockup on 9400M (NVAC) when using acceleration, see #27501.
>
> Signed-off-by: Pierre Moreau <pierre.morrow at free.fr>
> ---
>   drivers/gpu/drm/nouveau/core/engine/disp/nv50.c | 9 +++++++++
>   1 file changed, 9 insertions(+)
>
> diff --git a/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c
b/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c
> index a7efbff..e425604 100644
> --- a/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c
> +++ b/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c
> @@ -1137,6 +1137,15 @@ nv50_disp_base_init(struct nouveau_object *object)
>   	if (ret)
>   		return ret;
>   
> +	if (nv_device(priv)->chipset == 0xac) {
> +		nv_mask(priv, 0x100c18, 0x00000000, 0x000027ff);
> +		nv_mask(priv, 0x100c14, 0x00000000, 0x00000001);
> +		nv_mask(priv, 0x100c1c, 0x00000000, 0x000027fc);
> +		nv_mask(priv, 0x100c14, 0x00000000, 0x00000002);
> +		nv_mask(priv, 0x100c24, 0x00000002, 0x000027fd);
> +		nv_mask(priv, 0x100c14, 0x00000000, 0x00010000);
> +	}
> +
>   	/* The below segments of code copying values from one register to
>   	 * another appear to inform EVO of the display capabilities or
>   	 * something similar.  NFI what the 0x614004 caps are for..