llvm dev - Jul 2019 - [RFC] Promoting the RISC-V backend from 'experimental' to 'official' for 9.0

The 9.0 release is currently scheduled to branch in 10 days time, on
the 18th of July, with a final release expected on 28th August. I
would like to propose promoting the RISC-V backend from its current
"experimental" status to "official" prior to this branch.
This means
that the RISC-V backend will be built by default and support included
in standard binary distributions of LLVM/Clang.

# Status

RISC-V is a modular ISA with 32- and 64-bit variants, as well as a range of
options specified in "ISA naming strings". The RISC-V backend supports
both variants and all standard extensions. RV32IMAFDC, RV64IMAFDC, and
the ilp32, ilp32f, ilp32d, lp64, lp64f, lp64d ABIs (the clang
hard-float ABI patch will land imminently
<https://reviews.llvm.org/D60456>).

We have a fairly comprehensive out set of in-tree unit tests, multiple
groups have indicated they are using Clang/LLVM for their RISC-V
embedded firmware builds and more recently we have been pushing
forwards on issues related to building Linux/FreeBSD applications. The
GCC torture suite has a 100% pass rate, we're seeing a 98% pass rate
on the LLVM test-suite (failures are almost all related to C++
exception handling, which we hope to resolve soon), and we've been
able to get over 90% of buildroot's over 20000 packages to build for
RISC-V using clang, where most failures are due to build system issues
or GCCisms. We can compile and run meaningful programs (e.g. build a
rootfs with nginx, serve HTTP requests).

Additionally, I understand that LLD support is now roughly feature-complete
with the exception of support for linker relaxation. Fangrui Song has been
most active on RISC-V LLD recently.

There is initial Rust support for bare metal rv32 and rv64, with support for
hard float Linux targets due to start soon.

I believe that we are ready to flip the switch towards an 'official'
target.
At lowRISC, we're ready to address any issues that arise, and as noted below
we're delighted that there's a growing community of contributors around
this
backend who are equally invested in its success.

## Thanks

I started work on the RISC-V LLVM backend around the end of 2016
through lowRISC, a not-for-profit open source hardware/software
engineering company I co-founded. I'd like to thank everyone who gave
encouragement, helped with funding in order to support this work, or
submitted reviews or patches. As well as growing the toolchain team at
lowRISC (Luís Marques, Sam Elliott, and myself), we've been able to
help grow a community of contributors around this work. There are far
too many names to mention, but engineers from organisations such as
Qualcomm, AndesTech, Embecosm, Google, and the University of Cambridge
have all made notable contributions.

## End

Although becoming an official backend would be a huge milestone, of course
it's
far from the end of the road. We'll be continuing to work on code size and
generated code performance improvements, better testing, working with language
communities like Rust/Swift/Julia/..., support for additional LLVM features
and RISC-V instruction set extensions, etc.

Any questions / concerns / feedback?

--
Alex Bradbury,
CTO and Co-Founder, lowRISC CIC

Sure. I'll support this.

-eric

On Mon, Jul 8, 2019 at 3:18 PM Alex Bradbury via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
>
> The 9.0 release is currently scheduled to branch in 10 days time, on
> the 18th of July, with a final release expected on 28th August. I
> would like to propose promoting the RISC-V backend from its current
> "experimental" status to "official" prior to this
branch. This means
> that the RISC-V backend will be built by default and support included
> in standard binary distributions of LLVM/Clang.
>
> # Status
>
> RISC-V is a modular ISA with 32- and 64-bit variants, as well as a range of
> options specified in "ISA naming strings". The RISC-V backend
supports
> both variants and all standard extensions. RV32IMAFDC, RV64IMAFDC, and
> the ilp32, ilp32f, ilp32d, lp64, lp64f, lp64d ABIs (the clang
> hard-float ABI patch will land imminently
> <https://reviews.llvm.org/D60456>).
>
> We have a fairly comprehensive out set of in-tree unit tests, multiple
> groups have indicated they are using Clang/LLVM for their RISC-V
> embedded firmware builds and more recently we have been pushing
> forwards on issues related to building Linux/FreeBSD applications. The
> GCC torture suite has a 100% pass rate, we're seeing a 98% pass rate
> on the LLVM test-suite (failures are almost all related to C++
> exception handling, which we hope to resolve soon), and we've been
> able to get over 90% of buildroot's over 20000 packages to build for
> RISC-V using clang, where most failures are due to build system issues
> or GCCisms. We can compile and run meaningful programs (e.g. build a
> rootfs with nginx, serve HTTP requests).
>
> Additionally, I understand that LLD support is now roughly feature-complete
> with the exception of support for linker relaxation. Fangrui Song has been
> most active on RISC-V LLD recently.
>
> There is initial Rust support for bare metal rv32 and rv64, with support
for
> hard float Linux targets due to start soon.
>
> I believe that we are ready to flip the switch towards an
'official' target.
> At lowRISC, we're ready to address any issues that arise, and as noted
below
> we're delighted that there's a growing community of contributors
around this
> backend who are equally invested in its success.
>
> ## Thanks
>
> I started work on the RISC-V LLVM backend around the end of 2016
> through lowRISC, a not-for-profit open source hardware/software
> engineering company I co-founded. I'd like to thank everyone who gave
> encouragement, helped with funding in order to support this work, or
> submitted reviews or patches. As well as growing the toolchain team at
> lowRISC (Luís Marques, Sam Elliott, and myself), we've been able to
> help grow a community of contributors around this work. There are far
> too many names to mention, but engineers from organisations such as
> Qualcomm, AndesTech, Embecosm, Google, and the University of Cambridge
> have all made notable contributions.
>
> ## End
>
> Although becoming an official backend would be a huge milestone, of course
it's
> far from the end of the road. We'll be continuing to work on code size
and
> generated code performance improvements, better testing, working with
language
> communities like Rust/Swift/Julia/..., support for additional LLVM features
> and RISC-V instruction set extensions, etc.
>
> Any questions / concerns / feedback?
>
> --
> Alex Bradbury,
> CTO and Co-Founder, lowRISC CIC
> _______________________________________________
> LLVM Developers mailing list
> llvm-dev at lists.llvm.org
> https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev

On 7/8/19 5:19 PM, Alex Bradbury via llvm-dev wrote:
> The 9.0 release is currently scheduled to branch in 10 days time, on
> the 18th of July, with a final release expected on 28th August. I
> would like to propose promoting the RISC-V backend from its current
> "experimental" status to "official" prior to this
branch. This means
> that the RISC-V backend will be built by default and support included
> in standard binary distributions of LLVM/Clang.
>
> # Status
>
> RISC-V is a modular ISA with 32- and 64-bit variants, as well as a range of
> options specified in "ISA naming strings". The RISC-V backend
supports
> both variants and all standard extensions. RV32IMAFDC, RV64IMAFDC, and
> the ilp32, ilp32f, ilp32d, lp64, lp64f, lp64d ABIs (the clang
> hard-float ABI patch will land imminently
> <https://reviews.llvm.org/D60456>).
>
> We have a fairly comprehensive out set of in-tree unit tests, multiple
> groups have indicated they are using Clang/LLVM for their RISC-V
> embedded firmware builds and more recently we have been pushing
> forwards on issues related to building Linux/FreeBSD applications. The
> GCC torture suite has a 100% pass rate, we're seeing a 98% pass rate
> on the LLVM test-suite (failures are almost all related to C++
> exception handling, which we hope to resolve soon), and we've been
> able to get over 90% of buildroot's over 20000 packages to build for
> RISC-V using clang, where most failures are due to build system issues
> or GCCisms. We can compile and run meaningful programs (e.g. build a
> rootfs with nginx, serve HTTP requests).

Does Clang/LLVM self host?

>
> Additionally, I understand that LLD support is now roughly feature-complete
> with the exception of support for linker relaxation. Fangrui Song has been
> most active on RISC-V LLD recently.
>
> There is initial Rust support for bare metal rv32 and rv64, with support
for
> hard float Linux targets due to start soon.
>
> I believe that we are ready to flip the switch towards an
'official' target.
> At lowRISC, we're ready to address any issues that arise, and as noted
below
> we're delighted that there's a growing community of contributors
around this
> backend who are equally invested in its success.
>
> ## Thanks
>
> I started work on the RISC-V LLVM backend around the end of 2016
> through lowRISC, a not-for-profit open source hardware/software
> engineering company I co-founded. I'd like to thank everyone who gave
> encouragement, helped with funding in order to support this work, or
> submitted reviews or patches. As well as growing the toolchain team at
> lowRISC (Luís Marques, Sam Elliott, and myself), we've been able to
> help grow a community of contributors around this work. There are far
> too many names to mention, but engineers from organisations such as
> Qualcomm, AndesTech, Embecosm, Google, and the University of Cambridge
> have all made notable contributions.
>
> ## End
>
> Although becoming an official backend would be a huge milestone, of course
it's
> far from the end of the road. We'll be continuing to work on code size
and
> generated code performance improvements, better testing, working with
language
> communities like Rust/Swift/Julia/..., support for additional LLVM features
> and RISC-V instruction set extensions, etc.
>
> Any questions / concerns / feedback?

This sounds like great progress.

Is there a buildbot?

  -Hal

>
> --
> Alex Bradbury,
> CTO and Co-Founder, lowRISC CIC
> _______________________________________________
> LLVM Developers mailing list
> llvm-dev at lists.llvm.org
> https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev
-- 
Hal Finkel
Lead, Compiler Technology and Programming Languages
Leadership Computing Facility
Argonne National Laboratory

On 7/8/19 6:19 PM, Alex Bradbury via llvm-dev wrote:
> The 9.0 release is currently scheduled to branch in 10 days time, on
> the 18th of July, with a final release expected on 28th August. I
> would like to propose promoting the RISC-V backend from its current
> "experimental" status to "official" prior to this
branch. This means
> that the RISC-V backend will be built by default and support included
> in standard binary distributions of LLVM/Clang.
The Zig binaries available on ziglang.org/download have had the RISC-V
backend enabled for some time now. Personally I'm very much in favor of
making the backend official within LLVM so that package managers
everywhere have it enabled.
> Although becoming an official backend would be a huge milestone, of course
it's
> far from the end of the road. We'll be continuing to work on code size
and
> generated code performance improvements, better testing, working with
language
> communities like Rust/Swift/Julia/..., support for additional LLVM features
> and RISC-V instruction set extensions, etc.
> 
> Any questions / concerns / feedback?
You have the support of the Zig project for testing. I believe that
SourceHut is planning on having RISC-V images available soon for
automated testing, and once that is available, Zig project will be able
to provide pretty decent test coverage for the backend.

Congratulations on this milestone Alex!

Andrew

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Please make it so! And thanks for all your hard work.

On Mon, Jul 8, 2019 at 3:18 PM Alex Bradbury via llvm-dev
<llvm-dev at lists.llvm.org> wrote:
>
> The 9.0 release is currently scheduled to branch in 10 days time, on
> the 18th of July, with a final release expected on 28th August. I
> would like to propose promoting the RISC-V backend from its current
> "experimental" status to "official" prior to this
branch. This means
> that the RISC-V backend will be built by default and support included
> in standard binary distributions of LLVM/Clang.
>
> # Status
>
> RISC-V is a modular ISA with 32- and 64-bit variants, as well as a range of
> options specified in "ISA naming strings". The RISC-V backend
supports
> both variants and all standard extensions. RV32IMAFDC, RV64IMAFDC, and
> the ilp32, ilp32f, ilp32d, lp64, lp64f, lp64d ABIs (the clang
> hard-float ABI patch will land imminently
> <https://reviews.llvm.org/D60456>).
>
> We have a fairly comprehensive out set of in-tree unit tests, multiple
> groups have indicated they are using Clang/LLVM for their RISC-V
> embedded firmware builds and more recently we have been pushing
> forwards on issues related to building Linux/FreeBSD applications. The
> GCC torture suite has a 100% pass rate, we're seeing a 98% pass rate
> on the LLVM test-suite (failures are almost all related to C++
> exception handling, which we hope to resolve soon), and we've been
> able to get over 90% of buildroot's over 20000 packages to build for
> RISC-V using clang, where most failures are due to build system issues
> or GCCisms. We can compile and run meaningful programs (e.g. build a
> rootfs with nginx, serve HTTP requests).
>
> Additionally, I understand that LLD support is now roughly feature-complete
> with the exception of support for linker relaxation. Fangrui Song has been
> most active on RISC-V LLD recently.
>
> There is initial Rust support for bare metal rv32 and rv64, with support
for
> hard float Linux targets due to start soon.
>
> I believe that we are ready to flip the switch towards an
'official' target.
> At lowRISC, we're ready to address any issues that arise, and as noted
below
> we're delighted that there's a growing community of contributors
around this
> backend who are equally invested in its success.
>
> ## Thanks
>
> I started work on the RISC-V LLVM backend around the end of 2016
> through lowRISC, a not-for-profit open source hardware/software
> engineering company I co-founded. I'd like to thank everyone who gave
> encouragement, helped with funding in order to support this work, or
> submitted reviews or patches. As well as growing the toolchain team at
> lowRISC (Luís Marques, Sam Elliott, and myself), we've been able to
> help grow a community of contributors around this work. There are far
> too many names to mention, but engineers from organisations such as
> Qualcomm, AndesTech, Embecosm, Google, and the University of Cambridge
> have all made notable contributions.
>
> ## End
>
> Although becoming an official backend would be a huge milestone, of course
it's
> far from the end of the road. We'll be continuing to work on code size
and
> generated code performance improvements, better testing, working with
language
> communities like Rust/Swift/Julia/..., support for additional LLVM features
> and RISC-V instruction set extensions, etc.
>
> Any questions / concerns / feedback?
>
> --
> Alex Bradbury,
> CTO and Co-Founder, lowRISC CIC
> _______________________________________________
> LLVM Developers mailing list
> llvm-dev at lists.llvm.org
> https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev

This is fantastic progress Alex, congratulations.  Judging by the official
criteria, I think you’re covered if there is a buildbot:
http://llvm.org/docs/DeveloperPolicy.html#new-targets
<http://llvm.org/docs/DeveloperPolicy.html#new-targets>

I am also very +1 on including this as an official target assuming that is taken
care of, thank you!

-Chris

> On Jul 8, 2019, at 3:19 PM, Alex Bradbury via llvm-dev <llvm-dev at
lists.llvm.org> wrote:
> 
> The 9.0 release is currently scheduled to branch in 10 days time, on
> the 18th of July, with a final release expected on 28th August. I
> would like to propose promoting the RISC-V backend from its current
> "experimental" status to "official" prior to this
branch. This means
> that the RISC-V backend will be built by default and support included
> in standard binary distributions of LLVM/Clang.
> 
> # Status
> 
> RISC-V is a modular ISA with 32- and 64-bit variants, as well as a range of
> options specified in "ISA naming strings". The RISC-V backend
supports
> both variants and all standard extensions. RV32IMAFDC, RV64IMAFDC, and
> the ilp32, ilp32f, ilp32d, lp64, lp64f, lp64d ABIs (the clang
> hard-float ABI patch will land imminently
> <https://reviews.llvm.org/D60456>).
> 
> We have a fairly comprehensive out set of in-tree unit tests, multiple
> groups have indicated they are using Clang/LLVM for their RISC-V
> embedded firmware builds and more recently we have been pushing
> forwards on issues related to building Linux/FreeBSD applications. The
> GCC torture suite has a 100% pass rate, we're seeing a 98% pass rate
> on the LLVM test-suite (failures are almost all related to C++
> exception handling, which we hope to resolve soon), and we've been
> able to get over 90% of buildroot's over 20000 packages to build for
> RISC-V using clang, where most failures are due to build system issues
> or GCCisms. We can compile and run meaningful programs (e.g. build a
> rootfs with nginx, serve HTTP requests).
> 
> Additionally, I understand that LLD support is now roughly feature-complete
> with the exception of support for linker relaxation. Fangrui Song has been
> most active on RISC-V LLD recently.
> 
> There is initial Rust support for bare metal rv32 and rv64, with support
for
> hard float Linux targets due to start soon.
> 
> I believe that we are ready to flip the switch towards an
'official' target.
> At lowRISC, we're ready to address any issues that arise, and as noted
below
> we're delighted that there's a growing community of contributors
around this
> backend who are equally invested in its success.
> 
> ## Thanks
> 
> I started work on the RISC-V LLVM backend around the end of 2016
> through lowRISC, a not-for-profit open source hardware/software
> engineering company I co-founded. I'd like to thank everyone who gave
> encouragement, helped with funding in order to support this work, or
> submitted reviews or patches. As well as growing the toolchain team at
> lowRISC (Luís Marques, Sam Elliott, and myself), we've been able to
> help grow a community of contributors around this work. There are far
> too many names to mention, but engineers from organisations such as
> Qualcomm, AndesTech, Embecosm, Google, and the University of Cambridge
> have all made notable contributions.
> 
> ## End
> 
> Although becoming an official backend would be a huge milestone, of course
it's
> far from the end of the road. We'll be continuing to work on code size
and
> generated code performance improvements, better testing, working with
language
> communities like Rust/Swift/Julia/..., support for additional LLVM features
> and RISC-V instruction set extensions, etc.
> 
> Any questions / concerns / feedback?
> 
> --
> Alex Bradbury,
> CTO and Co-Founder, lowRISC CIC
> _______________________________________________
> LLVM Developers mailing list
> llvm-dev at lists.llvm.org
> https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev
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+1 from me

On 7/8/19 3:19 PM, Alex Bradbury via llvm-dev wrote:
> The 9.0 release is currently scheduled to branch in 10 days time, on
> the 18th of July, with a final release expected on 28th August. I
> would like to propose promoting the RISC-V backend from its current
> "experimental" status to "official" prior to this
branch. This means
> that the RISC-V backend will be built by default and support included
> in standard binary distributions of LLVM/Clang.
>
> # Status
>
> RISC-V is a modular ISA with 32- and 64-bit variants, as well as a range of
> options specified in "ISA naming strings". The RISC-V backend
supports
> both variants and all standard extensions. RV32IMAFDC, RV64IMAFDC, and
> the ilp32, ilp32f, ilp32d, lp64, lp64f, lp64d ABIs (the clang
> hard-float ABI patch will land imminently
> <https://reviews.llvm.org/D60456>).
>
> We have a fairly comprehensive out set of in-tree unit tests, multiple
> groups have indicated they are using Clang/LLVM for their RISC-V
> embedded firmware builds and more recently we have been pushing
> forwards on issues related to building Linux/FreeBSD applications. The
> GCC torture suite has a 100% pass rate, we're seeing a 98% pass rate
> on the LLVM test-suite (failures are almost all related to C++
> exception handling, which we hope to resolve soon), and we've been
> able to get over 90% of buildroot's over 20000 packages to build for
> RISC-V using clang, where most failures are due to build system issues
> or GCCisms. We can compile and run meaningful programs (e.g. build a
> rootfs with nginx, serve HTTP requests).
>
> Additionally, I understand that LLD support is now roughly feature-complete
> with the exception of support for linker relaxation. Fangrui Song has been
> most active on RISC-V LLD recently.
>
> There is initial Rust support for bare metal rv32 and rv64, with support
for
> hard float Linux targets due to start soon.
>
> I believe that we are ready to flip the switch towards an
'official' target.
> At lowRISC, we're ready to address any issues that arise, and as noted
below
> we're delighted that there's a growing community of contributors
around this
> backend who are equally invested in its success.
>
> ## Thanks
>
> I started work on the RISC-V LLVM backend around the end of 2016
> through lowRISC, a not-for-profit open source hardware/software
> engineering company I co-founded. I'd like to thank everyone who gave
> encouragement, helped with funding in order to support this work, or
> submitted reviews or patches. As well as growing the toolchain team at
> lowRISC (Luís Marques, Sam Elliott, and myself), we've been able to
> help grow a community of contributors around this work. There are far
> too many names to mention, but engineers from organisations such as
> Qualcomm, AndesTech, Embecosm, Google, and the University of Cambridge
> have all made notable contributions.
>
> ## End
>
> Although becoming an official backend would be a huge milestone, of course
it's
> far from the end of the road. We'll be continuing to work on code size
and
> generated code performance improvements, better testing, working with
language
> communities like Rust/Swift/Julia/..., support for additional LLVM features
> and RISC-V instruction set extensions, etc.
>
> Any questions / concerns / feedback?
>
> --
> Alex Bradbury,
> CTO and Co-Founder, lowRISC CIC
> _______________________________________________
> LLVM Developers mailing list
> llvm-dev at lists.llvm.org
> https://lists.llvm.org/cgi-bin/mailman/listinfo/llvm-dev